llvm::StringMap<Attribute>& identifier_to_attr) {
  ArrayAttr dilations =
      mlir::dyn_cast<ArrayAttr>(identifier_to_attr["dilations"]);
  const int dilation_h = mlir::cast<IntegerAttr>(dilations[1]).getInt();
  const int dilation_w = mlir::cast<IntegerAttr>(dilations[2]).getInt();
  return rewriter.getI64ArrayAttr({dilation_h, dilation_w});
}

Attribute GetPaddingValue(PatternRewriter& rewriter,

    inferredReturnTypes.assign({result_type});
    return success();
  }

  auto stride_h = op.getStrideHAttr().getInt();
  auto stride_w = op.getStrideWAttr().getInt();
  auto dilation_h = op.getDilationHFactorAttr().getInt();
  auto dilation_w = op.getDilationWFactorAttr().getInt();

  // We don't have EXPLICIT PADDING in TfLite.
  auto paddings = op.getPadding();
  tensorflow::Padding padding;

      int dilation_i = mlir::cast<IntegerAttr>(dilations[i]).getInt();
      int out_size = tflite::ComputeOutSize(kTfLitePaddingSame, input_size,
                                            filter_size, stride_i, dilation_i);

      int offset = 0;
      int padding_before = tflite::ComputePaddingWithOffset(
          stride_i, dilation_i, input_size, filter_size, out_size, &offset);

                                       "Conv2D op doesn't have valid padding");
  }
  // Make sure dilations are all ones if set.
  const ArrayAttr& dilations =
      op->template getAttrOfType<ArrayAttr>("dilations");
  if (dilations && !TFIntListIsAllOnes(dilations)) {
    return rewriter.notifyMatchFailure(op, "dilations should be all 1");
  }

  if (!TFL::TFTypeIsFloat32Tensor(op.getInput()) &&

    // Constructs dilation array.
    SmallVector<int64_t, 4> dilation;
    if (auto rhs_dilation = conv_op.getRhsDilation()) {
      // For example, [2, 3] -> [1, 2, 3, 1].
      dilation.emplace_back(1);
      dilation.append(rhs_dilation.value().getValues<int64_t>().begin(),
                      rhs_dilation.value().getValues<int64_t>().end());
      dilation.emplace_back(1);
    } else {

// CHECK-NEXT: %[[CONV2D_0:.*]] = "tf.Conv2D"(%arg0, %arg1)
// CHECK-SAME: data_format = "NHWC", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true
// CHECK-SAME: attr_map = "0:strides,1:use_cudnn_on_gpu,2:padding,3:explicit_paddings,4:dilations"
// CHECK-NEXT: %[[BIASADD_0:.*]] = "tf.BiasAdd"(%[[CONV2D_0]], %arg2)
// CHECK-NEXT: %[[RELU6_0:.*]] = "tf.Relu6"(%[[BIASADD_0]])

  %3 = "tf.AddV2"(%2, %1): (tensor<15x28x28x1xf32>, tensor<1xf32>) -> tensor<15x28x28x1xf32>
  func.return %2 : tensor<15x28x28x1xf32>

  %cst_0 = "tf.Const"() {value = dense<0.500000e+00> : tensor<2xf32>} : () -> tensor<2xf32>
  %0 = "tf.Conv2D"(%arg0, %cst) {data_format = "NHWC", dilations = [1, 1, 2, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true} : (tensor<1x3x4x3xf32>, tensor<2x3x3x2xf32>) -> tensor<1x3x2x2xf32>

  %3 = "tf.AddV2"(%2, %1): (tensor<15x28x28x1xf32>, tensor<1xf32>) -> tensor<15x28x28x1xf32>
  func.return %2 : tensor<15x28x28x1xf32>

    %0 = "tf.Conv2D"(%arg0, %arg1) {attr_map = "0:strides,1:use_cudnn_on_gpu,2:padding,3:explicit_paddings,4:dilations", data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "VALID", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true} : (tensor<*xf32>, tensor<*xf32>) -> tensor<*xf32>