LEAL	const(a)(DI*1),a; \
	MOVL	(index*4)(SI),DI; \
	XORL	d,		BP; \
	XORL	b,		BP; \
	ADDL	BP,		a; \
	ROLL	$shift,		a; \
	MOVL	b,		BP; \
	ADDL	b,		a

#define ROUND4(a, b, c, d, index, const, shift) \
	LEAL	const(a)(DI*1),a; \
	ORL	b,		BP; \
	XORL	c,		BP; \
	ADDL	BP,		a; \
	MOVL	(index*4)(SI),DI; \
	MOVL	$0xffffffff,	BP; \
	ROLL	$shift,		a; \
	XORL	c,		BP; \
	ADDL	b,		a

TEXT	·block(SB),NOSPLIT,$24-16

	MOVL	AX, CX; \
	RORL	$17, AX; \
	MOVL	CX, DX; \
	RORL	$19, CX; \
	SHRL	$10, DX; \
	MOVL	((index-15)*4)(BP), BX; \
	XORL	CX, AX; \
	MOVL	BX, CX; \
	XORL	DX, AX; \
	RORL	$7, BX; \
	MOVL	CX, DX; \
	SHRL	$3, DX; \
	RORL	$18, CX; \
	ADDL	((index-7)*4)(BP), AX; \
	XORL	CX, BX; \
	XORL	DX, BX; \
	ADDL	((index-16)*4)(BP), BX; \
	ADDL	BX, AX; \
	MOVL	AX, ((index)*4)(BP)

#define ROUND3FIRST(a, b, c, d, index, const, shift) \
	MOVL	d,		R9; \
	XORL	c,		R9; \
	XORL	b,		R9; \
	ADDL	$const,	a; \
	ADDL	R8,		a; \
	MOVL	(index*4)(SI),R8; \
	ADDL	R9,		a; \
	ROLL	$shift,		a; \
	ADDL	b,		a

#define ROUND3(a, b, c, d, index, const, shift) \
	XORL	a,		R9; \
	XORL	b,		R9; \
	ADDL	$const,	a; \
	ADDL	R8,		a; \
	MOVL	(index*4)(SI),R8; \
	ADDL	R9,		a; \

	MOVL	AX, CX; \
	RORL	$17, AX; \
	MOVL	CX, DX; \
	RORL	$19, CX; \
	SHRL	$10, DX; \
	MOVL	((index-15)*4)(BP), BX; \
	XORL	CX, AX; \
	MOVL	BX, CX; \
	XORL	DX, AX; \
	RORL	$7, BX; \
	MOVL	CX, DX; \
	SHRL	$3, DX; \
	RORL	$18, CX; \
	ADDL	((index-7)*4)(BP), AX; \
	XORL	CX, BX; \
	XORL	DX, BX; \
	ADDL	((index-16)*4)(BP), BX; \
	ADDL	BX, AX; \
	MOVL	AX, ((index)*4)(BP)

	MOVL	(((index)&0xf)*4)(SP), DI; \
	XORL	(((index-3)&0xf)*4)(SP), DI; \
	XORL	(((index-8)&0xf)*4)(SP), DI; \
	XORL	(((index-14)&0xf)*4)(SP), DI; \
	ROLL	$1, DI; \
	MOVL	DI, (((index)&0xf)*4)(SP); \
	ADDL	DI, e

#define FUNC1(a, b, c, d, e) \
	MOVL	d, DI; \
	XORL	c, DI; \
	ANDL	b, DI; \
	XORL	d, DI

#define FUNC2(a, b, c, d, e) \
	MOVL	b, DI; \
	XORL	c, DI; \
	XORL	d, DI

#define FUNC3(a, b, c, d, e) \

	MOVL	(((index)&0xf)*4)(SP), R10; \
	XORL	(((index-3)&0xf)*4)(SP), R10; \
	XORL	(((index-8)&0xf)*4)(SP), R10; \
	XORL	(((index-14)&0xf)*4)(SP), R10; \
	ROLL	$1, R10; \
	MOVL	R10, (((index)&0xf)*4)(SP)

#define FUNC1(a, b, c, d, e) \
	MOVL	d, R9; \
	XORL	c, R9; \
	ANDL	b, R9; \
	XORL	d, R9

#define FUNC2(a, b, c, d, e) \
	MOVL	b, R9; \
	XORL	c, R9; \
	XORL	d, R9

#define FUNC3(a, b, c, d, e) \

	movq %rdi, %rax
	divq %r8

	# expand remainder to 128 for return
	movq %rdx, %rax
	xorl %edx, %edx
	ret

1:
	# crash - only want 64-bit divisor
	xorl %ecx, %ecx
	movl %ecx, 0(%ecx)
	jmp 1b

.section .note.GNU-stack,"",@progbits
EOF

cat >umod-arm64.c <<'EOF'
typedef unsigned int u128 __attribute__((mode(TI)));

	n += a &^ (1 << 0)

	return n
}

func bitcompl32(a, b uint32) (n uint32) {
	// amd64:"BTCL"
	n += b ^ (1 << (a & 31))

	// amd64:"XORL\t[$]-2147483648"
	n += a ^ (1 << 31)

	// amd64:"XORL\t[$]268435456"
	n += a ^ (1 << 28)

	// amd64:"XORL\t[$]1"
	n += a ^ (1 << 0)

	return n
}

// check direct operation on memory with constant and shifted constant sources

	return math.Float32frombits(u32+1) + 1
}

// Test that comparisons with constants converted to float
// are evaluated at compile-time

func constantCheck64() bool {
	// amd64:"(MOVB\t[$]0)|(XORL\t[A-Z][A-Z0-9]+, [A-Z][A-Z0-9]+)",-"FCMP",-"MOVB\t[$]1"
	// s390x:"MOV(B|BZ|D)\t[$]0,",-"FCMPU",-"MOV(B|BZ|D)\t[$]1,"
	return 0.5 == float64(uint32(1)) || 1.5 > float64(uint64(1<<63))
}

func constantCheck32() bool {

	MOVQ	val+4(FP), M0
	MOVQ	M0, (AX)
	EMMS
	// This is essentially a no-op, but it provides required memory fencing.
	// It can be replaced with MFENCE, but MFENCE was introduced only on the Pentium4 (SSE2).
	XORL	AX, AX
	LOCK
	XADDL	AX, (SP)
	RET

// void	·Or8(byte volatile*, byte);
TEXT ·Or8(SB), NOSPLIT, $0-5
	MOVL	ptr+0(FP), AX
	MOVB	val+4(FP), BX
	LOCK
	ORB	BX, (AX)
	RET