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Results 1 - 4 of 4 for BSRQ (0.18 sec)

  1. test/codegen/mathbits.go

    // ----------------------- //
    
    func LeadingZeros(n uint) int {
    	// amd64/v1,amd64/v2:"BSRQ"
    	// amd64/v3:"LZCNTQ", -"BSRQ"
    	// s390x:"FLOGR"
    	// arm:"CLZ" arm64:"CLZ"
    	// mips:"CLZ"
    	// wasm:"I64Clz"
    	// ppc64x:"CNTLZD"
    	return bits.LeadingZeros(n)
    }
    
    func LeadingZeros64(n uint64) int {
    	// amd64/v1,amd64/v2:"BSRQ"
    	// amd64/v3:"LZCNTQ", -"BSRQ"
    	// s390x:"FLOGR"
    	// arm:"CLZ" arm64:"CLZ"
    	// mips:"CLZ"
    	// wasm:"I64Clz"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 18:51:17 UTC 2024
    - 19.6K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/AMD64.rules

    // For GOAMD64>=3, BitLen can be calculated by OperandSize - LZCNT(x).
    (BitLen64 <t> x) && buildcfg.GOAMD64 < 3 => (ADDQconst [1] (CMOVQEQ <t> (Select0 <t> (BSRQ x)) (MOVQconst <t> [-1]) (Select1 <types.TypeFlags> (BSRQ x))))
    (BitLen32 x) && buildcfg.GOAMD64 <  3 => (Select0 (BSRQ (LEAQ1 <typ.UInt64> [1] (MOVLQZX <typ.UInt64> x) (MOVLQZX <typ.UInt64> x))))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 93.9K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/rewriteAMD64.go

    	v_0 := v.Args[0]
    	b := v.Block
    	typ := &b.Func.Config.Types
    	// match: (BitLen64 <t> x)
    	// cond: buildcfg.GOAMD64 < 3
    	// result: (ADDQconst [1] (CMOVQEQ <t> (Select0 <t> (BSRQ x)) (MOVQconst <t> [-1]) (Select1 <types.TypeFlags> (BSRQ x))))
    	for {
    		t := v.Type
    		x := v_0
    		if !(buildcfg.GOAMD64 < 3) {
    			break
    		}
    		v.reset(OpAMD64ADDQconst)
    		v.AuxInt = int32ToAuxInt(1)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 712.7K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/opGen.go

    			},
    			outputs: []outputInfo{
    				{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
    			},
    		},
    	},
    	{
    		name:   "BSRQ",
    		argLen: 1,
    		asm:    x86.ABSRQ,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
    			},
    			outputs: []outputInfo{
    				{1, 0},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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