Search Options

Results per page
Sort
Preferred Languages
Advance

Results 1 - 10 of 74 for cmpeqb (0.12 sec)

  1. src/cmd/internal/obj/ppc64/anames.go

    	"VSRAW",
    	"VSRAD",
    	"VSOI",
    	"VSLDOI",
    	"VCLZ",
    	"VCLZB",
    	"VCLZH",
    	"VCLZW",
    	"VCLZD",
    	"VPOPCNT",
    	"VPOPCNTB",
    	"VPOPCNTH",
    	"VPOPCNTW",
    	"VPOPCNTD",
    	"VCMPEQ",
    	"VCMPEQUB",
    	"VCMPEQUBCC",
    	"VCMPEQUH",
    	"VCMPEQUHCC",
    	"VCMPEQUW",
    	"VCMPEQUWCC",
    	"VCMPEQUD",
    	"VCMPEQUDCC",
    	"VCMPGT",
    	"VCMPGTUB",
    	"VCMPGTUBCC",
    	"VCMPGTUH",
    	"VCMPGTUHCC",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 01 18:50:29 UTC 2024
    - 6.7K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/ppc64.s

    	CMPWU R3, $0, CR3               // CMPWU R3,CR3,$0      // 29830000
    	CMPWU R3, $0x8008, CR3          // CMPWU R3,CR3,$32776  // 29838008
    
    	CMPEQB R3,R4,CR6                // 7f0321c0
    	CMPB R3,R4,R4                   // 7c6423f8
    
    	ADD R3, R4                      // 7c841a14
    	ADD R3, R4, R5                  // 7ca41a14
    	ADDC R3, R4                     // 7c841814
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 21:53:50 UTC 2024
    - 50.2K bytes
    - Viewed (0)
  3. src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go

    	BCDSCC:         "bcds.",
    	BCDSETSGNCC:    "bcdsetsgn.",
    	BCDSRCC:        "bcdsr.",
    	BCDTRUNCCC:     "bcdtrunc.",
    	BCDUSCC:        "bcdus.",
    	BCDUTRUNCCC:    "bcdutrunc.",
    	CMPEQB:         "cmpeqb",
    	CMPRB:          "cmprb",
    	CNTTZD:         "cnttzd",
    	CNTTZDCC:       "cnttzd.",
    	CNTTZW:         "cnttzw",
    	CNTTZWCC:       "cnttzw.",
    	COPY:           "copy",
    	CPABORT:        "cpabort",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 22 17:16:14 UTC 2022
    - 334.7K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/ppc64/asm9.go

    	case ACMPW:
    		return OPVCC(31, 0, 0, 0) /* L=0 */
    	case ACMPWU:
    		return OPVCC(31, 32, 0, 0)
    	case ACMPB:
    		return OPVCC(31, 508, 0, 0) /* cmpb - v2.05 */
    	case ACMPEQB:
    		return OPVCC(31, 224, 0, 0) /* cmpeqb - v3.00 */
    
    	case ACNTLZW:
    		return OPVCC(31, 26, 0, 0)
    	case ACNTLZWCC:
    		return OPVCC(31, 26, 0, 1)
    	case ACNTLZD:
    		return OPVCC(31, 58, 0, 0)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 13:55:28 UTC 2024
    - 156.1K bytes
    - Viewed (0)
  5. src/cmd/internal/obj/mips/anames.go

    	"BEQ",
    	"BFPF",
    	"BFPT",
    	"BGEZ",
    	"BGEZAL",
    	"BGTZ",
    	"BLEZ",
    	"BLTZ",
    	"BLTZAL",
    	"BNE",
    	"BREAK",
    	"CLO",
    	"CLZ",
    	"CMOVF",
    	"CMOVN",
    	"CMOVT",
    	"CMOVZ",
    	"CMPEQD",
    	"CMPEQF",
    	"CMPGED",
    	"CMPGEF",
    	"CMPGTD",
    	"CMPGTF",
    	"DIV",
    	"DIVD",
    	"DIVF",
    	"DIVU",
    	"DIVW",
    	"GOK",
    	"LL",
    	"LLV",
    	"LUI",
    	"MADD",
    	"MOVB",
    	"MOVBU",
    	"MOVD",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 1.4K bytes
    - Viewed (0)
  6. src/cmd/internal/obj/loong64/anames.go

    	"ABSF",
    	"ADD",
    	"ADDD",
    	"ADDF",
    	"ADDU",
    	"ADDW",
    	"AND",
    	"BEQ",
    	"BGEZ",
    	"BLEZ",
    	"BGTZ",
    	"BLTZ",
    	"BFPF",
    	"BFPT",
    	"BNE",
    	"BREAK",
    	"CLO",
    	"CLZ",
    	"CMPEQD",
    	"CMPEQF",
    	"CMPGED",
    	"CMPGEF",
    	"CMPGTD",
    	"CMPGTF",
    	"LU12IW",
    	"LU32ID",
    	"LU52ID",
    	"PCALAU12I",
    	"PCADDU12I",
    	"JIRL",
    	"BGE",
    	"BLT",
    	"BLTU",
    	"BGEU",
    	"DIV",
    	"DIVD",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 1.9K bytes
    - Viewed (0)
  7. src/cmd/asm/internal/arch/loong64.go

    }
    
    // IsLoong64CMP reports whether the op (as defined by an loong64.A* constant) is
    // one of the CMP instructions that require special handling.
    func IsLoong64CMP(op obj.As) bool {
    	switch op {
    	case loong64.ACMPEQF, loong64.ACMPEQD, loong64.ACMPGEF, loong64.ACMPGED,
    		loong64.ACMPGTF, loong64.ACMPGTD:
    		return true
    	}
    	return false
    }
    
    // IsLoong64MUL reports whether the op (as defined by an loong64.A* constant) is
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 2.1K bytes
    - Viewed (0)
  8. src/internal/bytealg/equal_386.s

    	JMP	bigloop
    #endif
    	MOVOU	(SI), X0
    	MOVOU	(DI), X1
    	MOVOU	16(SI), X2
    	MOVOU	16(DI), X3
    	MOVOU	32(SI), X4
    	MOVOU	32(DI), X5
    	MOVOU	48(SI), X6
    	MOVOU	48(DI), X7
    	PCMPEQB	X1, X0
    	PCMPEQB	X3, X2
    	PCMPEQB	X5, X4
    	PCMPEQB	X7, X6
    	PAND	X2, X0
    	PAND	X6, X4
    	PAND	X4, X0
    	PMOVMSKB X0, DX
    	ADDL	$64, SI
    	ADDL	$64, DI
    	SUBL	$64, BX
    	CMPL	DX, $0xffff
    	JEQ	hugeloop
    	MOVB	$0, (AX)
    	RET
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Aug 23 21:22:58 UTC 2021
    - 2.1K bytes
    - Viewed (0)
  9. src/internal/bytealg/equal_amd64.s

    	MOVOU	48(SI), X6
    	MOVOU	48(DI), X7
    	PCMPEQB	X1, X0
    	PCMPEQB	X3, X2
    	PCMPEQB	X5, X4
    	PCMPEQB	X7, X6
    	PAND	X2, X0
    	PAND	X6, X4
    	PAND	X4, X0
    	PMOVMSKB X0, DX
    	ADDQ	$64, SI
    	ADDQ	$64, DI
    	SUBQ	$64, BX
    	CMPL	DX, $0xffff
    	JEQ	hugeloop
    	XORQ	AX, AX	// return 0
    	RET
    #endif
    
    	// 64 bytes at a time using ymm registers
    	PCALIGN $16
    hugeloop_avx2:
    	CMPQ	BX, $64
    	JB	bigloop_avx2
    	VMOVDQU	(SI), Y0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Nov 17 16:34:40 UTC 2023
    - 2.8K bytes
    - Viewed (0)
  10. src/internal/bytealg/compare_amd64.s

    TEXT cmpbody<>(SB),NOSPLIT,$0-0
    	CMPQ	SI, DI
    	JEQ	allsame
    	CMPQ	BX, DX
    	MOVQ	DX, R8
    	CMOVQLT	BX, R8 // R8 = min(alen, blen) = # of bytes to compare
    	CMPQ	R8, $8
    	JB	small
    
    	CMPQ	R8, $63
    	JBE	loop
    #ifndef hasAVX2
    	CMPB	internal∕cpu·X86+const_offsetX86HasAVX2(SB), $1
    	JEQ     big_loop_avx2
    	JMP	big_loop
    #else
    	JMP	big_loop_avx2
    #endif
    loop:
    	CMPQ	R8, $16
    	JBE	_0through16
    	MOVOU	(SI), X0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Aug 18 17:17:01 UTC 2022
    - 4.3K bytes
    - Viewed (0)
Back to top