VPGATHERDQ Y0, 664(X4*8), Y6            // c4e2fd9034e598020000
	VPGATHERDQ Y0, 8(X14*1), Y6             // c4a2fd90343508000000
	VPGATHERDQ Y0, -8(X14*1), Y6            // c4a2fd903435f8ffffff
	VPGATHERDQ Y0, 0(X14*1), Y6             // c4a2fd90343500000000
	VPGATHERDQ Y0, 664(X14*1), Y6           // c4a2fd90343598020000
	VPGATHERDQ Y0, 8(X14*8), Y6             // c4a2fd9034f508000000

	VPGATHERDQ X2, 664(BX*1), X1    // ERROR "invalid instruction"
	VPGATHERDQ Y2, (BP)(AX*2), Y1   // ERROR "invalid instruction"
	VPGATHERDQ Y5, 664(DX*8), Y6    // ERROR "invalid instruction"
	VPGATHERDQ Y5, (DX), Y0         // ERROR "invalid instruction"
	// VM/X rejects Y index register.
	VPGATHERDQ Y5, 664(Y14*8), Y6   // ERROR "invalid instruction"
	VPGATHERQQ X2, (BP)(Y7*2), X1   // ERROR "invalid instruction"

p256ord<>+0x00(SB), (const0, const1) LDP p256ord<>+0x10(SB), (const2, const3) LDP 0*16(a_ptr), (x0, x1) LDP 1*16(a_ptr), (x2, x3) LDP 0*16(b_ptr), (y0, y1) LDP 1*16(b_ptr), (y2, y3) // y[0] * x MUL y0, x0, acc0 UMULH y0, x0, acc1 MUL y0, x1, t0 ADDS t0, acc1 UMULH y0, x1, acc2 MUL y0, x2, t0 ADCS t0, acc2 UMULH y0, x2, acc3 MUL y0, x3, t0 ADCS t0, acc3 UMULH y0, x3, acc4 ADC $0, acc4 // First reduction step MUL acc0, hlp1, hlp0 MUL const0, hlp1, t0 ADDS t0, acc0, acc0 UMULH const0, hlp0, t1 MUL const1,...

p256ord<>+0x00(SB), (const0, const1) LDP p256ord<>+0x10(SB), (const2, const3) LDP 0*16(a_ptr), (x0, x1) LDP 1*16(a_ptr), (x2, x3) LDP 0*16(b_ptr), (y0, y1) LDP 1*16(b_ptr), (y2, y3) // y[0] * x MUL y0, x0, acc0 UMULH y0, x0, acc1 MUL y0, x1, t0 ADDS t0, acc1 UMULH y0, x1, acc2 MUL y0, x2, t0 ADCS t0, acc2 UMULH y0, x2, acc3 MUL y0, x3, t0 ADCS t0, acc3 UMULH y0, x3, acc4 ADC $0, acc4 // First reduction step MUL acc0, hlp1, hlp0 MUL const0, hlp1, t0 ADDS t0, acc0, acc0 UMULH const0, hlp0, t1 MUL const1,...

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