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Results 1 - 4 of 4 for BTCQconst (0.28 sec)
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src/cmd/compile/internal/ssa/_gen/AMD64.rules
// Fold combinations of bit ops on same bit. An example is math.Copysign(c,-1) (BTSQconst [c] (BTRQconst [c] x)) => (BTSQconst [c] x) (BTSQconst [c] (BTCQconst [c] x)) => (BTSQconst [c] x) (BTRQconst [c] (BTSQconst [c] x)) => (BTRQconst [c] x) (BTRQconst [c] (BTCQconst [c] x)) => (BTRQconst [c] x) // Fold boolean negation into SETcc. (XORLconst [1] (SETNE x)) => (SETEQ x) (XORLconst [1] (SETEQ x)) => (SETNE x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 93.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
{name: "BTQconst", argLength: 1, reg: gp1flags, asm: "BTQ", typ: "Flags", aux: "Int8"}, // test whether bit auxint in arg0 is set, 0 <= auxint < 64 {name: "BTCQconst", argLength: 1, reg: gp11, asm: "BTCQ", resultInArg0: true, clobberFlags: true, aux: "Int8"}, // complement bit auxint in arg0, 31 <= auxint < 64
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 98K bytes - Viewed (1) -
src/cmd/compile/internal/ssa/rewriteAMD64.go
v0.Aux = symToAux(s) v0.AddArg2(p, mem) return true } return false } func rewriteValueAMD64_OpAMD64BTCQconst(v *Value) bool { v_0 := v.Args[0] // match: (BTCQconst [c] (MOVQconst [d])) // result: (MOVQconst [d^(1<<uint32(c))]) for { c := auxIntToInt8(v.AuxInt) if v_0.Op != OpAMD64MOVQconst { break } d := auxIntToInt64(v_0.AuxInt)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 712.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
argLen: 1, asm: x86.ABTQ, reg: regInfo{ inputs: []inputInfo{ {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 }, }, }, { name: "BTCQconst", auxType: auxInt8, argLen: 1, resultInArg0: true, clobberFlags: true, asm: x86.ABTCQ, reg: regInfo{ inputs: []inputInfo{
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)