VADDPD X30, X29, X28        // 6201950058e6
	VADDPD (AX), X29, X0        // 62f195005800
	VADDPD (AX), X1, X28        // 6261f5085820
	VADDPD (AX), X29, X28       // 626195005820
	VADDPD (AX), X29, X10       // 627195005810
	VADDPD (AX), X10, X28       // 6261ad085820
	VADDPD (CX)(AX*1), X29, X0  // 62f19500580401
	VADDPD (CX)(AX*1), X1, X28  // 6261f508582401
	VADDPD (CX)(AX*1), X29, X28 // 62619500582401

	RET
TEXT ·a23(SB), 0, $0-0
	CMPL runtime·writeBarrier(SB), $0
	LEAQ (AX)(CX*1), R15
	RET
TEXT ·a24(SB), 0, $0-0
	CMPL runtime·writeBarrier(SB), $0
	LEAQ (R15)(AX*1), AX // ERROR "when dynamic linking, R15 is clobbered by a global variable access and is used here"
	RET
TEXT ·a25(SB), 0, $0-0
	CMPL runtime·writeBarrier(SB), $0

	MOVQ 2147483647+1(AX), AX       // ERROR "offset too large"
	MOVQ 3395469782(R10), R8        // ERROR "offset too large"
	LEAQ 3395469782(AX), AX         // ERROR "offset too large"
	ADDQ 3395469782(AX), AX         // ERROR "offset too large"
	ADDL 3395469782(AX), AX         // ERROR "offset too large"
	ADDW 3395469782(AX), AX         // ERROR "offset too large"
	LEAQ 433954697820(AX), AX       // ERROR "offset too large"

	MOVQ (AX), M0  // 0f6f00
	MOVQ M0, 8(SP) // 0f7f442408
	MOVQ 8(SP), M0 // 0f6f442408
	MOVQ M0, (AX)  // 0f7f00
	MOVQ M0, (BX)  // 0f7f03
	// On non-64bit arch, Go asm allowed uint32 offsets instead of int32.
	// These tests check that property for backwards-compatibility.
	MOVL 2147483648(AX), AX  // 8b8000000080
	MOVL -2147483648(AX), AX // 8b8000000080
	ADDL 2147483648(AX), AX  // 038000000080

	{"$~(1<<63)", "$9223372036854775807"},
	{"$~0x3F", "$-64"},
	{"$~15", "$-16"},
	{"(((8)&0xf)*4)(SP)", "32(SP)"},
	{"(((8-14)&0xf)*4)(SP)", "40(SP)"},
	{"(6+8)(AX)", "14(AX)"},
	{"(8*4)(BP)", "32(BP)"},
	{"(AX)", "(AX)"},
	{"(AX)(CX*8)", "(AX)(CX*8)"},
	{"(BP)(CX*4)", "(BP)(CX*4)"},
	{"(BP)(DX*4)", "(BP)(DX*4)"},
	{"(BP)(R8*4)", "(BP)(R8*4)"},
	{"(BX)", "(BX)"},
	{"(DI)", "(DI)"},

	},
	{
		"LOAD macro",
		lines(
			"#define LOAD(off, reg) \\",
			"\tMOVBLZX	(off*4)(R12),	reg \\",
			"\tADDB	reg,		DX",
			"",
			"LOAD(8, AX)",
		),
		"\n.\n.MOVBLZX.(.8.*.4.).(.R12.).,.AX.\n.ADDB.AX.,.DX.\n",
	},
	{
		"nested multiline macro",
		lines(
			"#define KEYROUND(xmm, load, off, r1, r2, index) \\",
			"\tMOVBLZX	(BP)(DX*4),	R8 \\",
			"\tload((off+1), r2) \\",

For example, the sequence to load <code>g</code> and <code>m</code>
using <code>CX</code> looks like this:
</p>

<pre>
#include "go_tls.h"
#include "go_asm.h"
...
get_tls(CX)
MOVL	g(CX), AX     // Move g into AX.
MOVL	g_m(AX), BX   // Move g.m into BX.
</pre>

<p>
The <code>get_tls</code> macro is also defined on <a href="#amd64">amd64</a>.
</p>

<p>
Addressing modes:
</p>

<ul>

<li>

			if tok == scanner.EOF {
				p.errorf("unexpected EOF")
				return "", "", nil, false
			}
			// Split operands on comma. Also, the old syntax on x86 for a "register pair"
			// was AX:DX, for which the new syntax is DX, AX. Note the reordering.
			if tok == '\n' || tok == ';' || (nesting == 0 && (tok == ',' || tok == ':')) {
				if tok == ':' {
					// Remember this location so we can swap the operands below.
					if colon >= 0 {

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