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Results 1 - 10 of 20 for window_dimensions (0.37 sec)

  1. tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/defer_activation_transpose.mlir

    // CHECK: <{window_dimensions = array<i64: 1, 2, 2, 1>, window_strides = array<i64: 1, 2, 2, 1>}>
    // CHECK: ^bb0(%[[REDUCE_ARG_0:.+]]: tensor<f32>, %[[REDUCE_ARG_1:.+]]: tensor<f32>):
    // CHECK: %[[MAX:.+]] = stablehlo.maximum %[[REDUCE_ARG_0]], %[[REDUCE_ARG_1]]
    // CHECK: stablehlo.return %[[MAX]]
    
    // Check that the attributes window_dimensions & window_strides are also
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 18 20:32:46 UTC 2024
    - 14.6K bytes
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  2. tensorflow/compiler/mlir/lite/stablehlo/tests/optimize_layout.mlir

    // CHECK-SAME:          %[[PAD_VAL:.*]]: tensor<f32>) -> tensor<1x64x56x56xf32> {
    // CHECK:           %[[REDUCE:.*]] = "stablehlo.reduce_window"(%[[INPUT]], %[[PAD_VAL]])
    // CHECK:               <{window_dimensions = array<i64: 1, 3, 3, 1>,
    // CHECK:                 window_strides = array<i64: 1, 2, 2, 1>}> ({
    // CHECK:           ^bb0(%[[ARG0:.*]]: tensor<f32>, %[[ARG1:.*]]: tensor<f32>):
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 21:59:06 UTC 2024
    - 2.8K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/quantize/quantize_op_with_region.mlir

        // CHECK: %[[REDUCE:.*]] = "stablehlo.reduce_window"(%[[CALL]], %[[Q0]])
        // CHECK{LITERAL}: padding = dense<[[0, 0], [1, 1], [1, 1], [0, 0]]> : tensor<4x2xi64>
        // CHECK-SAME: window_dimensions = array<i64: 1, 3, 3, 1>
        // CHECK: %[[ARG1:.*]]: tensor<!quant.uniform<i8:f32, 3.000000e-01:1>>, %[[ARG2:.*]]: tensor<!quant.uniform<i8:f32, 3.000000e-01:1>>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 18 20:32:46 UTC 2024
    - 18.9K bytes
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  4. tensorflow/compiler/mlir/lite/flatbuffer_operator.cc

        return;
      }
      if (const auto* op = op_union.AsStablehloReduceWindowOptions()) {
        if (!op->window_dimensions.empty()) {
          attributes.emplace_back(builder.getNamedAttr(
              "window_dimensions",
              BuildVhloTensorV1Attr(
                  {static_cast<int64_t>(op->window_dimensions.size())},
                  op->window_dimensions, builder)));
        }
        if (!op->window_strides.empty()) {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 21 18:21:50 UTC 2024
    - 38K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/quantization/stablehlo/tests/pipelines/process_nchw_tensor.mlir

      %4 = "stablehlo.reduce_window"(%3, %5) ({  // max pool
      ^bb0(%arg1: tensor<f32>, %arg2: tensor<f32>):
          %6 = stablehlo.maximum %arg1, %arg2 : tensor<f32>
          stablehlo.return %6 : tensor<f32>
      }) {
        window_dimensions = array<i64: 1, 1, 2, 2>,
        window_strides = array<i64: 1, 1, 2, 2>
      } : (tensor<1x4x5x5xf32>, tensor<f32>) -> tensor<1x4x2x2xf32>
      return %4 : tensor<1x4x2x2xf32>
    }
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 18 20:32:46 UTC 2024
    - 12.6K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/tensorflow/transforms/shape_inference.cc

              << x_name
              << "\nNumber of window dimensions: " << window_dimensions.size()
              << "\nNumber of " << x_name << ": " << x << "\n";
          return false;
        }
      };
    
      if (!(verify_size(window_dimensions.size(), "window_dimensions") &&
            verify_size(window_strides.size(), "window strides") &&
            verify_size(padding.size(), "padding entries") &&
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Sat Jun 08 07:28:49 UTC 2024
    - 134.1K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/lite/stablehlo/tests/composite-lowering.mlir

        mhlo.return %7 : tensor<f32>
      }) {window_dimensions = dense<[1, 1, 3, 3]> : tensor<4xi64>} : (tensor<1x3x6x6xf32>, tensor<f32>) -> tensor<1x3x4x4xf32>
      %4 = "mhlo.reduce_window"(%1, %2) ({
      ^bb0(%arg1: tensor<f32>, %arg2: tensor<f32>):
        %7 = mhlo.add %arg1, %arg2 : tensor<f32>
        mhlo.return %7 : tensor<f32>
      }) {window_dimensions = dense<3> : tensor<2xi64>} : (tensor<6x6xf32>, tensor<f32>) -> tensor<4x4xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jun 06 18:45:51 UTC 2024
    - 32.6K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/tf2xla/tests/legalize-tf.mlir

    func.func @maxpool_valid_padding(%arg0: tensor<2x12x20x7xi32>) -> tensor<2x3x5x7xi32> {
      // CHECK: %[[INIT:.*]] = mhlo.constant dense<-2147483648> : tensor<i32>
      // CHECK: "mhlo.reduce_window"(%[[ARG]], %[[INIT]])
      // CHECK: <{window_dimensions = dense<[1, 2, 2, 1]> : tensor<4xi64>, window_strides = dense<[1, 4, 4, 1]> : tensor<4xi64>}>
      // CHECK: mhlo.maximum
      // CHECK: mhlo.return
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon May 06 18:46:23 UTC 2024
    - 335.5K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/quantization/stablehlo/passes/defer_activation_transpose.cc

        auto new_reduce_window_op =
            rewriter.create<mlir::stablehlo::ReduceWindowOp>(
                op.getLoc(), new_result_type, transpose_op.getOperand(),
                /*init_value=*/op.getOperand(1),
                /*window_dimensions=*/
                PermuteI64ArrayAttr(rewriter, op.getWindowDimensions(),
                                    kNchwToNhwcPermutation),
                /*window_strides=*/
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 11.5K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/lite/stablehlo/tests/legalize_hlo.mlir

          "mhlo.return"(%5) : (tensor<f32>) -> ()
        }) {
        base_dilations = dense<1> : tensor<4xi64>,
        padding = dense<0> : tensor<4x2xi64>,
        window_dilations = dense<1> : tensor<4xi64>,
        window_dimensions = dense<[1, 3, 3, 1]> : tensor<4xi64>,
        window_strides = dense<[1, 2, 2, 1]> : tensor<4xi64>} : (tensor<4x16x16x8xf32>, tensor<f32>) -> tensor<4x7x7x8xf32>
      %3 = mhlo.divide %2, %1 : tensor<4x7x7x8xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 29 07:26:59 UTC 2024
    - 340.2K bytes
    - Viewed (0)
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