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Results 1 - 10 of 27 for window_dimensions (0.22 sec)
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tensorflow/compiler/jit/xla_ops_on_regular_devices.cc
XlaCompileOnDemandOp); \ REGISTER_KERNEL_BUILDER(Name("XlaReduceWindow") \ .HostMemory("window_dimensions") \ .HostMemory("window_strides") \ .HostMemory("base_dilations") \
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Aug 19 19:55:14 UTC 2022 - 8.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/defer_activation_transpose.mlir
// CHECK: <{window_dimensions = array<i64: 1, 2, 2, 1>, window_strides = array<i64: 1, 2, 2, 1>}> // CHECK: ^bb0(%[[REDUCE_ARG_0:.+]]: tensor<f32>, %[[REDUCE_ARG_1:.+]]: tensor<f32>): // CHECK: %[[MAX:.+]] = stablehlo.maximum %[[REDUCE_ARG_0]], %[[REDUCE_ARG_1]] // CHECK: stablehlo.return %[[MAX]] // Check that the attributes window_dimensions & window_strides are also
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 18 20:32:46 UTC 2024 - 14.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/optimize_layout.mlir
// CHECK-SAME: %[[PAD_VAL:.*]]: tensor<f32>) -> tensor<1x64x56x56xf32> { // CHECK: %[[REDUCE:.*]] = "stablehlo.reduce_window"(%[[INPUT]], %[[PAD_VAL]]) // CHECK: <{window_dimensions = array<i64: 1, 3, 3, 1>, // CHECK: window_strides = array<i64: 1, 2, 2, 1>}> ({ // CHECK: ^bb0(%[[ARG0:.*]]: tensor<f32>, %[[ARG1:.*]]: tensor<f32>):
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 21:59:06 UTC 2024 - 2.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/quantize/quantize_op_with_region.mlir
// CHECK: %[[REDUCE:.*]] = "stablehlo.reduce_window"(%[[CALL]], %[[Q0]]) // CHECK{LITERAL}: padding = dense<[[0, 0], [1, 1], [1, 1], [0, 0]]> : tensor<4x2xi64> // CHECK-SAME: window_dimensions = array<i64: 1, 3, 3, 1> // CHECK: %[[ARG1:.*]]: tensor<!quant.uniform<i8:f32, 3.000000e-01:1>>, %[[ARG2:.*]]: tensor<!quant.uniform<i8:f32, 3.000000e-01:1>>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 18 20:32:46 UTC 2024 - 18.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/transforms/tfl_stablehlo_pass.cc
return true; if (op_name == "stablehlo.reduce_window" && (field_name == "window_dimensions" || field_name == "window_strides" || field_name == "base_dilations" || field_name == "window_dilations")) return true; if (op_name == "stablehlo.select_and_scatter" && (field_name == "window_dimensions" || field_name == "window_strides")) return true; if (op_name == "stablehlo.slice" &&
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jan 24 06:08:43 UTC 2024 - 10.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/flatbuffer_operator.cc
return; } if (const auto* op = op_union.AsStablehloReduceWindowOptions()) { if (!op->window_dimensions.empty()) { attributes.emplace_back(builder.getNamedAttr( "window_dimensions", BuildVhloTensorV1Attr( {static_cast<int64_t>(op->window_dimensions.size())}, op->window_dimensions, builder))); } if (!op->window_strides.empty()) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 21 18:21:50 UTC 2024 - 38K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/convert_func_to_bfloat16.mlir
^bb0(%arg1: tensor<f32>, %arg2: tensor<f32>): %2 = stablehlo.maximum %arg1, %arg2 : tensor<f32> stablehlo.return %2 : tensor<f32> }) {padding = dense<[[0, 0], [1, 1], [1, 1], [0, 0]]> : tensor<4x2xi64>, window_dimensions = array<i64: 1, 3, 3, 1>} : (tensor<2x3x1x3xf32>, tensor<f32>) -> tensor<2x3x1x3xf32> return %1 : tensor<2x3x1x3xf32> } // -----
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Feb 08 22:40:14 UTC 2024 - 6K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/tests/pipelines/process_nchw_tensor.mlir
%4 = "stablehlo.reduce_window"(%3, %5) ({ // max pool ^bb0(%arg1: tensor<f32>, %arg2: tensor<f32>): %6 = stablehlo.maximum %arg1, %arg2 : tensor<f32> stablehlo.return %6 : tensor<f32> }) { window_dimensions = array<i64: 1, 1, 2, 2>, window_strides = array<i64: 1, 1, 2, 2> } : (tensor<1x4x5x5xf32>, tensor<f32>) -> tensor<1x4x2x2xf32> return %4 : tensor<1x4x2x2xf32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 18 20:32:46 UTC 2024 - 12.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/shape_inference.cc
<< x_name << "\nNumber of window dimensions: " << window_dimensions.size() << "\nNumber of " << x_name << ": " << x << "\n"; return false; } }; if (!(verify_size(window_dimensions.size(), "window_dimensions") && verify_size(window_strides.size(), "window strides") && verify_size(padding.size(), "padding entries") &&
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Jun 08 07:28:49 UTC 2024 - 134.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/composite-lowering.mlir
mhlo.return %7 : tensor<f32> }) {window_dimensions = dense<[1, 1, 3, 3]> : tensor<4xi64>} : (tensor<1x3x6x6xf32>, tensor<f32>) -> tensor<1x3x4x4xf32> %4 = "mhlo.reduce_window"(%1, %2) ({ ^bb0(%arg1: tensor<f32>, %arg2: tensor<f32>): %7 = mhlo.add %arg1, %arg2 : tensor<f32> mhlo.return %7 : tensor<f32> }) {window_dimensions = dense<3> : tensor<2xi64>} : (tensor<6x6xf32>, tensor<f32>) -> tensor<4x4xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jun 06 18:45:51 UTC 2024 - 32.6K bytes - Viewed (0)