// make sure both a and b are aligned.
	OR	R4, R6, R15
	AND	$7, R15
	BNE	R0, R15, byte_loop

	PCALIGN	$16
chunk16_loop:
	BEQ	R0, R14, byte_loop
	MOVV	(R4), R8
	MOVV	(R6), R9
	BNE	R8, R9, byte_loop
	MOVV	8(R4), R16
	MOVV	8(R6), R17
	ADDV	$16, R4
	ADDV	$16, R6
	SUBVU	$1, R14
	BEQ	R16, R17, chunk16_loop
	SUBV	$8, R4
	SUBV	$8, R6

byte_loop:
	BEQ	R4, R12, samebytes
	MOVBU	(R4), R8

	MULU	R4, R5, R6		// a6101c00
	MULH	R4, R5	   		// a5901c00
	MULH	R4, R5, R6	   	// a6901c00
	MULHU	R4, R5			// a5101d00
	MULHU	R4, R5, R6		// a6101d00
	REM	R4, R5	  		// a5902000
	REM	R4, R5, R6	  	// a6902000
	REMU	R4, R5	   		// a5902100
	REMU	R4, R5, R6	   	// a6902100
	DIV	R4, R5	  		// a5102000
	DIV	R4, R5, R6	  	// a6102000
	DIVU	R4, R5	   		// a5102100
	DIVU	R4, R5, R6	   	// a6102100

	ADDV	$-7, R9, R6 // R6 is end pointer-7

	PCALIGN	$16
	SGTU	R6, R4, R8
	BEQ	R8, out
	MOVV	(R5), R7
	ADDV	$8, R5
	MOVV	R7, (R4)
	ADDV	$8, R4
	JMP	-6(PC)

out:
	BEQ	R4, R9, done
	MOVB	(R5), R7
	ADDV	$1, R5
	MOVB	R7, (R4)
	ADDV	$1, R4
	JMP	-5(PC)
done:
	RET

backward:
	ADDV	R6, R5 // from-end pointer
	ADDV	R4, R6, R9 // to-end pointer

	ADD	$32, R8
	ADD	$-32, R6
	CMP	R6, $8
	BLE	small
	// Case for 8 <= n < 32 bytes
	// Process 16 bytes if available
xor16:
	CMP	R6, $16
	BLT	xor8
	LXVD2X	(R4)(R8), VS32
	LXVD2X	(R5)(R8), VS33
	XXLXOR	VS32, VS33, VS32
	STXVD2X	VS32, (R3)(R8)
	ADD	$16, R8
	ADD	$-16, R6
small:
	CMP	R6, $0
	BC	12,2,LR		// BEQLR
xor8:
#ifdef GOPPC64_power10
	SLD	$56,R6,R17
	ADD	R4,R8,R18
	ADD	R5,R8,R19

	RLWNM $3, R4, $29, $31, R6      // 54861f7e
	RLWNM $0, R4, $29, $31, R6      // 5486077e
	RLWNM R0, R4, $29, $31, R6      // 5c86077e
	RLWNM R3, R4, $7, R6            // 5c861f7e
	RLWNM R3, R4, $29, $31, R6      // 5c861f7e
	RLWNMCC $3, R4, $7, R6          // 54861f7f
	RLWNMCC $3, R4, $29, $31, R6    // 54861f7f
	RLWNMCC R3, R4, $7, R6          // 5c861f7f
	RLWNMCC R3, R4, $29, $31, R6    // 5c861f7f
	RLDMI $0, R4, $7, R6            // 7886076c

// a1  | R5          | R4
// a2  | R6          | R5
// a3  | R7          | R6
// a4  | R8          | R7
// a5  | R9          | R8
// a6  | R10         | R9
//
// r1  | R4          | R4
// r2  | R5          | R5
// err | R6          | part of R4
TEXT ·Syscall6<ABIInternal>(SB),NOSPLIT,$0-80
	MOVV	R4, R11  // syscall entry
	MOVV	R5, R4
	MOVV	R6, R5
	MOVV	R7, R6
	MOVV	R8, R7
	MOVV	R9, R8
	MOVV	R10, R9

	LMG  0(R8), R5, R6
	MOVD $0, 0(R9)          // R9 address of SAVSTACK_ASYNC
	LE_CALL                 // balr R7, R6 (return #1)
	NOPH
	MOVD R3, ret+32(FP)
	CMP  R3, $-1            // compare result to -1
	BNE  done

	// retrieve errno and errno2
	MOVD  zosLibVec<>(SB), R8
	ADD   $(__errno), R8
	LMG   0(R8), R5, R6
	LE_CALL                   // balr R7, R6 __errno (return #3)
	NOPH

	ENDIAN_MOVE(16,R6,M04,M15)
	ENDIAN_MOVE(20,R6,M05,M15)
	ENDIAN_MOVE(24,R6,M06,M15)
	ENDIAN_MOVE(28,R6,M07,M15)

	ROUND1(R22,R3,R4,R5,M04,0xf57c0faf, 7);
	ROUND1(R5,R22,R3,R4,M05,0x4787c62a,12);
	ROUND1(R4,R5,R22,R3,M06,0xa8304613,17);
	ROUND1(R3,R4,R5,R22,M07,0xfd469501,22);

	ENDIAN_MOVE(32,R6,M08,M15)
	ENDIAN_MOVE(36,R6,M09,M15)
	ENDIAN_MOVE(40,R6,M10,M15)
	ENDIAN_MOVE(44,R6,M11,M15)

			},
			outputs: []outputInfo{
				{0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
				{1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
			},
		},
	},
	{
		name:   "MULA",
		argLen: 3,
		asm:    arm.AMULA,
		reg: regInfo{
			inputs: []inputInfo{
				{0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14

	// g is not nil. Check further.
	MOVD	g_m(R9), R6
	CMP	$0, R6
	BEQ	sigtramp    // g.m == nil
	MOVW	m_ncgo(R6), R7
	CMPW	$0, R7
	BEQ	sigtramp    // g.m.ncgo = 0
	MOVD	m_curg(R6), R7
	CMP	$0, R7
	BEQ	sigtramp    // g.m.curg == nil
	MOVD	g_syscallsp(R7), R7
	CMP	$0, R7
	BEQ	sigtramp    // g.m.curg.syscallsp == 0
	MOVD	m_cgoCallers(R6), R7 // R7 is the fifth arg in C calling convention.
	CMP	$0, R7