- Sort Score
- Result 10 results
- Languages All
Results 1 - 9 of 9 for ireg (0.04 sec)
-
src/cmd/asm/internal/asm/parse.go
// Expect (SB), (FP), (PC), or (SP) p.get('(') reg := p.get(scanner.Ident).String() p.get(')') p.setPseudoRegister(a, reg, isStatic, prefix) } // setPseudoRegister sets the NAME field of addr for a pseudo-register reference such as (SB). func (p *Parser) setPseudoRegister(addr *obj.Addr, reg string, isStatic bool, prefix rune) { if addr.Reg != 0 { p.errorf("internal error: reg %s already set in pseudo", reg) } switch reg {
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Wed Nov 12 03:59:40 UTC 2025 - 37.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/asm.go
// the CR bit. prog.Reg = a[1].Reg if a[1].Type != obj.TYPE_REG { // The CR bit is represented as a constant 0-31. Convert it to a Reg. c := p.getConstant(prog, op, &a[1]) reg, success := ppc64.ConstantToCRbit(c) if !success { p.errorf("invalid CR bit register number %d", c) } prog.Reg = reg } break }Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Tue Oct 21 15:13:08 UTC 2025 - 26.7K bytes - Viewed (0) -
src/cmd/asm/internal/arch/arm64.go
} // ARM64RegisterShift constructs an ARM64 register with shift operation. func ARM64RegisterShift(reg, op, count int16) (int64, error) { // the base register of shift operations must be general register. if reg > arm64.REG_R31 || reg < arm64.REG_R0 { return 0, errors.New("invalid register for shift operation") } return int64(reg&31)<<16 | int64(op)<<22 | int64(uint16(count)), nil }
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Thu Oct 16 00:35:29 UTC 2025 - 6.3K bytes - Viewed (0) -
android/guava/src/com/google/thirdparty/publicsuffix/PublicSuffixPatterns.java
c,tsewhtron-nc,??????n&h?l?s?y??om?qc?s&g?j?ppa-avnac,?t&cennockciuq.tcerid,en??ude?vog?wt?x&g?j?n?s??z&g?x??司公?絡網?络网??b??d&g!.ypnc,?ka??e&drag?erg?fuak?hctik?i&libommi?w??m?po?r!ednaalv??sier?ves??g!.&ca?gro?moc?ten?ude?vog??is&ed!.&cihparg,ssb,??irev???h!.&bog?gro?lim?moc?ten?ude???i!.&ac?bew,c&a?in??dni?e&m?sabapus,?g&5?6?p?ro??i&a?hled??k&nab?u??l&evart?im??m&a?oc?rif??n&c?eg?if??o&c?fni?i?rp??p&ooc?u??r&ahib?d?e??s&c?er?nduolc,senisub?u??t&arajug?en!retni??ni?sop??ude?v&og?t??ysrab,zib??elk...
Registered: Fri Dec 26 12:43:10 UTC 2025 - Last Modified: Tue Dec 16 20:00:28 UTC 2025 - 76.5K bytes - Viewed (1) -
src/cmd/asm/internal/arch/arch.go
for i := arm64.REG_V0; i <= arm64.REG_V31; i++ { register[obj.Rconv(i)] = int16(i) } // System registers. for i := 0; i < len(arm64.SystemReg); i++ { register[arm64.SystemReg[i].Name] = arm64.SystemReg[i].Reg } register["LR"] = arm64.REGLINK // Pseudo-registers. register["SB"] = RSB register["FP"] = RFP register["PC"] = RPC register["SP"] = RSP // Avoid unintentionally clobbering g using R28.Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Thu Nov 13 12:17:37 UTC 2025 - 21.7K bytes - Viewed (0) -
migrator/migrator.go
if length > 0 && field.Size > 0 { alterColumn = true } else { // has size in data type and not equal // Since the following code is frequently called in the for loop, reg optimization is needed here matches2 := regFullDataType.FindAllStringSubmatch(fullDataType, -1) if !field.PrimaryKey && (len(matches2) == 1 && matches2[0][1] != fmt.Sprint(length) && ok) { alterColumn = true
Registered: Sun Dec 28 09:35:17 UTC 2025 - Last Modified: Sun Oct 26 12:31:09 UTC 2025 - 29.7K bytes - Viewed (0) -
src/archive/tar/reader_test.go
// satisfies io.Seeker. func TestReadTruncation(t *testing.T) { var ss []string for _, p := range []string{ "testdata/gnu.tar", "testdata/ustar-file-reg.tar", "testdata/pax-path-hdr.tar", "testdata/sparse-formats.tar", } { buf, err := os.ReadFile(p) if err != nil { t.Fatalf("unexpected error: %v", err) } ss = append(ss, string(buf)) }
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Mon Dec 15 16:34:13 UTC 2025 - 47.5K bytes - Viewed (0) -
RELEASE.md
Kuang, Fei Hu, fo40225, formath, Fred Reiss, Frederic Bastien, Fredrik Knutsson, G. Hussain Chinoy, Gabriel, gehring, George Grzegorz Pawelczak, Gianluca Varisco, Gleb Popov, Greg Peatfield, Guillaume Klein, Gurpreet Singh, Gustavo Lima Chaves, haison, Haraldur TóMas HallgríMsson, HarikrishnanBalagopal, HåKon Sandsmark, I-Hong, Ilham Firdausi Putra, Imran Salam, Jason Zaman, Jason
Registered: Tue Dec 30 12:39:10 UTC 2025 - Last Modified: Tue Oct 28 22:27:41 UTC 2025 - 740.4K bytes - Viewed (3) -
lib/fips140/v1.1.0-rc1.zip
= Z2*Z2 * U1 = X1*T2 * H = X2*T1 * H = H-U1 * Z3 = Z1*Z2 * Z3 = Z3*H << store-out Z3 result reg.. could override Z1, if slices have same backing array * * S1 = Z2*T2 * S1 = Y1*S1 * R = Z1*T1 * R = Y2*R * R = R-S1 * * T1 = H*H * T2 = H*T1 * U1 = U1*T1 * * X3 = R*R * X3 = X3-T2 * T1 = 2*U1 * X3 = X3-T1 << store-out X3 result reg * * T2 = S1*T2 * Y3 = U1-X3 * Y3 = R*Y3 * Y3 = Y3-T2 << store-out Y3 result reg // X=Z1; Y=Z1; MUL; T- // T1 = Z1*Z1 // X- ; Y=T ; MUL; R=T // R = Z1*T1 // X=X2; Y- ; MUL;...
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Thu Dec 11 16:27:41 UTC 2025 - 663K bytes - Viewed (0)