func WalkASTWithParent(n ast.Node, f func(n ast.Node, parent ast.Node) bool) {
	var ancestors []ast.Node
	ast.Inspect(n, func(n ast.Node) (recurse bool) {
		if n == nil {
			ancestors = ancestors[:len(ancestors)-1]
			return false
		}

		var parent ast.Node
		if len(ancestors) > 0 {
			parent = ancestors[len(ancestors)-1]
		}
		ancestors = append(ancestors, n)
		return f(n, parent)
	})
}

     *
     * A file is contained in the set if it or one of its ancestors has
     * been added to the set.
     */
    public abstract boolean contains(File file);

    /**
     * Checks if the given path is contained in the set.
     *
     * A path is contained in the set if it or one of its ancestors has
     * been added to the set.
     */
    public abstract boolean contains(String path);

        parent1.ownStrictVersionConstraints != StrictVersionConstraints.EMPTY
        parent2.ownStrictVersionConstraints == StrictVersionConstraints.EMPTY
    }

    def "computes intersection of ancestors"() {
        when:
        def parent1Edge = edge(root, false)
        def parent2Edge = edge(root, false)
        def parent1 = parent1Edge.targetComponent.nodes[0]

}

// Checks if an op is a supported HLO control flow op.
bool IsControlFlowOp(Operation* op) { return isa<IfOp, WhileOp>(op); }

// Collects control flow op ancestors of a given op, up until FuncOp. If any
// ancestor is not a control flow op or a FuncOp, or of a single block region,
// an error will be returned.
LogicalResult GetControlFlowAncestors(

// `{ tac.device = "GPU", tac.inference_type = "FLOAT"}` to a function
// with the matching attributes. Assumed is that device type "CPU"
// is the only device that is allowed to call other devices. I.e. ancestors of a
// "CPU" `Operation` may only `Operations` without a device or other "CPU"
// `Operations`. Implied is that "CPU" ops may contain subgraphs of different

    }

    constexpr int64_t kDefaultCostEstimate = 1000000;
    rewriter.replaceOpWithNewOp<TF::XlaHostComputeOp>(
        op, op.getResultTypes(), op.getInputs(),
        /*ancestors=*/rewriter.getArrayAttr({}),
        rewriter.getArrayAttr(shape_attrs),
        /*shape_inference_graph=*/
        cloned_func ? SymbolRefAttr::get(cloned_func) : SymbolRefAttr(),

      return WalkResult::interrupt();
    }
    return WalkResult::advance();
  });
  return tpu_compile_successor;
}

// Get all the Blocks underneath `top` that are "in the scope" of `bottom`,
// i.e., are ancestors.
llvm::DenseSet<Block*> GetAllBlocksBetween(Operation* bottom, Operation* top) {
  llvm::DenseSet<Block*> blocks;
  Operation* op = bottom;
  while (op && op != top) {
    blocks.insert(op->getBlock());

	RecentTag(ctx context.Context, rev, prefix string, allowed func(tag string) bool) (tag string, err error)

	// DescendsFrom reports whether rev or any of its ancestors has the given tag.
	//
	// DescendsFrom must return true for any tag returned by RecentTag for the
	// same revision.
	DescendsFrom(ctx context.Context, rev, tag string) (bool, error)
}

      })
      .wasInterrupted();
}

// Returns whether `op` or any ancestors of `op` are outside compiled.
bool HasOutsideCompilationAncestor(Operation* op) {
  while (op) {
    if (op->hasAttr(kXlaOutsideCompilationAttr)) {
      return true;
    }
    op = op->getParentOp();
  }
  return false;
}

// Returns whether any ancestors of `op` are outside compiled.

    // CHECK:  tf.XlaHostCompute
    // CHECK-SAME:_xla_original_oc_node_name = "hcb0", _xla_token_input_nodes = ["_xla_token_arg_node"] 
    "tf.XlaHostCompute"(%cst) <{ancestors = [], cost_estimate_ns = 1000000 : i64, key = "_host_callback", recv_key = "", send_key = "", shapes = [], tpu_core = 0 : i64}> {_xla_original_oc_node_name = "hcb0", _xla_token_input_nodes = ["_xla_token_arg_node"]} : (tensor<i32>) -> ()