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Results 1 - 10 of 10 for Xmul (0.07 sec)
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tensorflow/compiler/mlir/lite/tests/legalize-tf.mlir
// CHECK: %[[MUL:.*]] = tfl.mul %arg0, %[[BROADCAST_TO]] {fused_activation_function = "NONE"} : tensor<8x7x6x5x4x3x2x1xf32> // CHECK: return %[[MUL]] : tensor<8x7x6x5x4x3x2x1xf32> } func.func @mul_with_high_dims_dynamic_shape_both_sides(%arg0: tensor<8x7x6x5x?x3x2x1xf32>, %arg1: tensor<?x3x2x1xf32>) -> tensor<8x7x6x5x?x3x2x1xf32> {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jun 05 01:54:33 UTC 2024 - 153.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/ops.mlir
// CHECK: tfl.mul %arg0, %arg1 {fused_activation_function = "RELU6"} %0 = tfl.mul %arg0, %arg1 {fused_activation_function = "RELU6"} : tensor<? x i16> func.return %0#0 : tensor<? x i16> } // CHECK-LABEL: testMulComplex func.func @testMulComplex(tensor<? x complex<f32>>, tensor<? x complex<f32>>) -> tensor<? x complex<f32>> { ^bb0(%arg0: tensor<? x complex<f32>>, %arg1: tensor<? x complex<f32>>):
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jun 06 19:09:08 UTC 2024 - 189.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/composite-lowering.mlir
// CHECK{LITERAL}: %cst_1 = arith.constant dense<[[[[1.000000e+00], [2.000000e+00]], [[2.000000e+00], [4.000000e+00]]]]> : tensor<1x2x2x1xf32> // CHECK: %3 = tfl.mul %2, %cst_1 {fused_activation_function = "NONE"} : tensor<1x2x2x1xf32> // CHECK: %cst_2 = arith.constant dense<[0, 3, 1, 2]> : tensor<4xi32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jun 06 18:45:51 UTC 2024 - 32.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64.rules
(Div16u x y) => (DIVWU (ZeroExt16to32 x) (ZeroExt16to32 y)) (Div8 x y) => (DIVW (SignExt8to32 x) (SignExt8to32 y)) (Div8u x y) => (DIVWU (ZeroExt8to32 x) (ZeroExt8to32 y)) (Hmul(64|64u|32|32u) ...) => (MULH(D|DU|W|WU) ...) (Mul(32|64)F ...) => ((FMULS|FMUL) ...) (Div(32|64)F ...) => ((FDIVS|FDIV) ...) // Lowering float <=> int (Cvt32to(32|64)F x) => ((FCFIDS|FCFID) (MTVSRD (SignExt32to64 x)))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 53.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssagen/ssa.go
{ir.OMUL, types.TINT8}: ssa.OpMul8, {ir.OMUL, types.TUINT8}: ssa.OpMul8, {ir.OMUL, types.TINT16}: ssa.OpMul16, {ir.OMUL, types.TUINT16}: ssa.OpMul16, {ir.OMUL, types.TINT32}: ssa.OpMul32, {ir.OMUL, types.TUINT32}: ssa.OpMul32, {ir.OMUL, types.TINT64}: ssa.OpMul64, {ir.OMUL, types.TUINT64}: ssa.OpMul64, {ir.OMUL, types.TFLOAT32}: ssa.OpMul32F,
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jun 10 19:44:43 UTC 2024 - 284.9K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/tools/internal/analysisinternal/analysis.go
default: return ast.NewIdent(t.Name()) } case *types.Pointer: x := TypeExpr(f, pkg, t.Elem()) if x == nil { return nil } return &ast.UnaryExpr{ Op: token.MUL, X: x, } case *types.Array: elt := TypeExpr(f, pkg, t.Elem()) if elt == nil { return nil } return &ast.ArrayType{ Len: &ast.BasicLit{ Kind: token.INT,
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Jun 04 16:19:04 UTC 2024 - 11.7K bytes - Viewed (0) -
src/math/big/float.go
} // ±0 - y // x - ±Inf return z.Neg(y) } // Mul sets z to the rounded product x*y and returns z. // Precision, rounding, and accuracy reporting are as for [Float.Add]. // Mul panics with [ErrNaN] if one operand is zero and the other // operand an infinity. The value of z is undefined in that case. func (z *Float) Mul(x, y *Float) *Float { if debugFloat { x.validate() y.validate() }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jun 06 15:46:54 UTC 2024 - 44.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/ir/tfl_ops.td
class OperandsSameElementTypeConstraintBase<string op> : PredOpTrait<op # " operands have same element type", OperandsSameElementTypeConstraintBasePred>; // This is a constraint for most of the binary ops, e.g., add, mul, div, etc. // Binary ops lhs & rhs should have the same value type, and is capable to // compare quantization types as well. def BinaryOpSameElementTypeConstraint : OperandsSameElementTypeConstraintBase<"binary op">;
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jun 06 19:09:08 UTC 2024 - 186K bytes - Viewed (0) -
RELEASE.md
* Unary GPU kernels: Abs, Atanh, Acos, Acosh, Asin, Asinh, Atan, Cos, Cosh, Sin, Sinh, Tan, Tanh. * Binary GPU kernels: AddV2, Sub, Div, DivNoNan, Mul, MulNoNan, FloorDiv, Equal, NotEqual, Greater, GreaterEqual, LessEqual, Less. * `tf.lite` * Add experimental supports conversion of models that may be larger than 2GB before buffer deduplication
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 11 23:24:08 UTC 2024 - 730.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewritePPC64.go
v.AuxInt = float64ToAuxInt(math.Abs(x)) return true } return false } func rewriteValuePPC64_OpPPC64FADD(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] // match: (FADD (FMUL x y) z) // cond: x.Block.Func.useFMA(v) // result: (FMADD x y z) for { for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { if v_0.Op != OpPPC64FMUL { continue }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 360.2K bytes - Viewed (0)