VSE8V		V3, (V1)			// ERROR "expected integer register in rd position"
	VLSE8V		(X10), V3			// ERROR "expected integer register in rs2 position"
	VLSE8V		(X10), X10, X11			// ERROR "expected vector register in vd position"
	VLSE8V		(V1), X10, V3			// ERROR "expected integer register in rs1 position"
	VLSE8V		(X10), V1, V0, V3		// ERROR "expected integer register in rs2 position"

	VSE64V		V3, (X10)			// a7710502
	VSE64V		V3, V0, (X10)			// a7710500
	VLMV		(X10), V3			// 8701b502
	VSMV		V3, (X10)			// a701b502

	// 31.7.5: Vector Strided Instructions
	VLSE8V		(X10), X11, V3			// 8701b50a
	VLSE8V		(X10), X11, V0, V3		// 8701b508
	VLSE16V		(X10), X11, V3			// 8751b50a
	VLSE16V		(X10), X11, V0, V3		// 8751b508
	VLSE32V		(X10), X11, V3			// 8761b50a
	VLSE32V		(X10), X11, V0, V3		// 8761b508