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Results 1 - 2 of 2 for VLOXSEG2EI8V (0.13 sec)
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src/cmd/asm/internal/asm/testdata/riscv64validation.s
VSUXSEG2EI8V V3, X11, V0, (X10) // ERROR "expected vector register in vs2 position" VLOXSEG2EI8V (X10), V2, X11 // ERROR "expected vector register in vd position" VLOXSEG2EI8V (V1), V2, V3 // ERROR "expected integer register in rs1 position" VLOXSEG2EI8V (X10), X11, V0, V3 // ERROR "expected vector register in vs2 position"
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Thu Nov 13 12:17:37 UTC 2025 - 42.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64.s
VSUXSEG8EI32V V24, V4, V0, (X10) // 276c45e4 VSUXSEG8EI64V V24, V4, V0, (X10) // 277c45e4 VLOXSEG2EI8V (X10), V4, V8 // 0704452e VLOXSEG2EI16V (X10), V4, V8 // 0754452e VLOXSEG2EI32V (X10), V4, V8 // 0764452e VLOXSEG2EI64V (X10), V4, V8 // 0774452e VLOXSEG2EI8V (X10), V4, V0, V8 // 0704452c VLOXSEG2EI16V (X10), V4, V0, V8 // 0754452c VLOXSEG2EI32V (X10), V4, V0, V8 // 0764452c
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Thu Nov 13 12:17:37 UTC 2025 - 73.7K bytes - Viewed (0)