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Results 1 - 2 of 2 for VLE8V (2.55 sec)

  1. src/cmd/asm/internal/asm/testdata/riscv64validation.s

    	VSETVLI		$-1, E32, M2, TA, MA, X12	// ERROR "must be in range [0, 31] (5 bits)"
    	VSETVL		X10, X11			// ERROR "expected integer register in rs1 position"
    	VLE8V		(X10), X10			// ERROR "expected vector register in vd position"
    	VLE8V		(V1), V3			// ERROR "expected integer register in rs1 position"
    	VLE8FFV		(X10), X10			// ERROR "expected vector register in vd position"
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Nov 13 12:17:37 UTC 2025
    - 42.1K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/riscv64.s

    	VSETIVLI $15, E32, M1, TA, MA, X12		// 57f607cd
    	VSETIVLI $31, E32, M1, TA, MA, X12		// 57f60fcd
    	VSETVL	X10, X11, X12				// 57f6a580
    
    	// 31.7.4: Vector Unit-Stride Instructions
    	VLE8V		(X10), V3			// 87010502
    	VLE8V		(X10), V0, V3			// 87010500
    	VLE16V		(X10), V3			// 87510502
    	VLE16V		(X10), V0, V3			// 87510500
    	VLE32V		(X10), V3			// 87610502
    	VLE32V		(X10), V0, V3			// 87610500
    	VLE64V		(X10), V3			// 87710502
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Nov 13 12:17:37 UTC 2025
    - 73.7K bytes
    - Viewed (0)
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