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src/cmd/asm/internal/asm/testdata/arm64error.s
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Tue Oct 14 19:00:00 UTC 2025 - 38.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/parse.go
} case lex.LSH: p.next() shift := p.factor() if int64(shift) < 0 { p.errorf("negative left shift count") } return value << shift case lex.RSH: p.next() shift := p.term() if int64(shift) < 0 { p.errorf("negative right shift count") } if int64(value) < 0 { p.errorf("right shift of value with high bit set") } value >>= shift
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Wed Nov 12 03:59:40 UTC 2025 - 37.3K bytes - Viewed (0) -
src/cmd/asm/internal/arch/arm64.go
} } return 0, false } // ARM64RegisterShift constructs an ARM64 register with shift operation. func ARM64RegisterShift(reg, op, count int16) (int64, error) { // the base register of shift operations must be general register. if reg > arm64.REG_R31 || reg < arm64.REG_R0 { return 0, errors.New("invalid register for shift operation") } return int64(reg&31)<<16 | int64(op)<<22 | int64(uint16(count)), nil }
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Thu Oct 16 00:35:29 UTC 2025 - 6.3K bytes - Viewed (0) -
apache-maven/src/assembly/maven/bin/mvn.cmd
@REM POM location, if supplied. set FILE_ARG= :arg_loop if "%~1" == "-f" ( set "FILE_ARG=%~2" shift goto process_file_arg ) if "%~1" == "--file" ( set "FILE_ARG=%~2" shift goto process_file_arg ) @REM If none of the above, skip the argument shift if not "%~1" == "" ( goto arg_loop ) else ( goto findBaseDir ) :process_file_arg
Registered: Sun Dec 28 03:35:09 UTC 2025 - Last Modified: Wed Dec 10 16:40:06 UTC 2025 - 10.7K bytes - Viewed (3) -
doc/asm.html
<code>R0->16</code> <br> <code>R0>>16</code> <br> <code>R0<<16</code> <br> <code>R0@>16</code>: For <code><<</code>, left shift <code>R0</code> by 16 bits. The other codes are <code>-></code> (arithmetic right shift), <code>>></code> (logical right shift), and <code>@></code> (rotate right). </li> <li> <code>R0->R1</code> <br> <code>R0>>R1</code> <br>
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Fri Nov 14 19:09:46 UTC 2025 - 36.5K bytes - Viewed (0) -
lib/time/update.bash
../mkzip ../../zoneinfo.zip cd ../.. files="update.bash zoneinfo.zip" modified=true if git diff --quiet $files; then modified=false fi if [ "$1" = "-work" ]; then echo Left workspace behind in work/. shift else rm -rf work fi if ! $modified; then echo No updates needed. exit 0 fi echo Updated for $CODE/$DATA: $files commitmsg="lib/time: update to $CODE/$DATA
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Thu Dec 11 16:47:56 UTC 2025 - 2.1K bytes - Viewed (0) -
guava/src/com/google/common/math/LongMath.java
int remainingPowersOf2 = 32; do { int shift = min(remainingPowersOf2, Long.numberOfLeadingZeros(a)); // shift is either the number of powers of 2 left to multiply a by, or the biggest shift // possible while keeping a in an unsigned long. a = UnsignedLongs.remainder(a << shift, m); remainingPowersOf2 -= shift; } while (remainingPowersOf2 > 0); return a;Registered: Fri Dec 26 12:43:10 UTC 2025 - Last Modified: Mon Nov 03 21:01:09 UTC 2025 - 46.8K bytes - Viewed (0) -
apache-maven/src/assembly/maven/bin/mvn
MAVEN_MAIN_CLASS="org.apache.maven.cling.MavenShellCling" ;; --up) MAVEN_MAIN_CLASS="org.apache.maven.cling.MavenUpCling" ;; *) ;; esac shift done } handle_args "$@" MAVEN_MAIN_CLASS=${MAVEN_MAIN_CLASS:=org.apache.maven.cling.MavenCling} # Build command string for eval cmd="\"$JAVACMD\" \ $MAVEN_OPTS \ $MAVEN_DEBUG_OPTS \
Registered: Sun Dec 28 03:35:09 UTC 2025 - Last Modified: Wed Dec 10 16:40:06 UTC 2025 - 9.2K bytes - Viewed (0) -
doc/go_spec.html
var u1 = 1.0<<s != 0 // illegal: 1.0 has type float64, cannot shift var u2 = 1<<s != 1.0 // illegal: 1 has type float64, cannot shift var v1 float32 = 1<<s // illegal: 1 has type float32, cannot shift var v2 = string(1<<s) // illegal: 1 is converted to a string, cannot shift
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Tue Dec 02 23:07:19 UTC 2025 - 286.5K bytes - Viewed (1) -
src/cmd/asm/internal/asm/testdata/riscv64.s
VXORVX X11, V2, V0, V3 // d7c1252c VXORVI $15, V2, V3 // d7b1272e VXORVI $15, V2, V0, V3 // d7b1272c VNOTV V2, V3 // d7b12f2e VNOTV V2, V0, V3 // d7b12f2c // 31.11.6: Vector Single-Width Shift Instructions VSLLVV V1, V2, V3 // d7812096 VSLLVV V1, V2, V0, V3 // d7812094 VSLLVX X11, V2, V3 // d7c12596 VSLLVX X11, V2, V0, V3 // d7c12594 VSLLVI $15, V2, V3 // d7b12796
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Thu Nov 13 12:17:37 UTC 2025 - 73.7K bytes - Viewed (0)