Search Options

Results per page
Sort
Preferred Languages
Advance

Results 1 - 7 of 7 for ADDW (0.05 sec)

  1. src/cmd/asm/internal/asm/testdata/loong64enc3.s

    	MOVV	$65536(R4), R5			// 1e020014de03800385f81000
    	MOVV	$4096(R4), R5			// 3e000014de03800385f81000
    	ADD	$74565, R4			// 5e020014de178d0384781000
    	ADD	$4097, R4  			// 3e000014de07800384781000
    	ADDW	$74565, R4			// 5e020014de178d0384781000
    	ADDW	$4097, R4  			// 3e000014de07800384781000
    	ADDV	$74565, R4			// 5e020014de178d0384f81000
    	ADDV	$4097, R4 			// 3e000014de07800384f81000
    	AND	$74565, R4			// 5e020014de178d0384f81400
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Nov 27 00:46:52 UTC 2025
    - 11.2K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/loong64enc2.s

    	ADD	$65536, R4, R5		// 1e02001485781000
    	ADD	$4096, R4, R5		// 3e00001485781000
    	ADD	$65536, R4		// 1e02001484781000
    	ADD	$4096, R4		// 3e00001484781000
    	ADDW	$65536, R4, R5		// 1e02001485781000
    	ADDW	$4096, R4, R5		// 3e00001485781000
    	ADDW	$65536, R4		// 1e02001484781000
    	ADDW	$4096, R4		// 3e00001484781000
    	ADDV	$65536, R4, R5		// 1e02001485f81000
    	ADDV	$4096, R4, R5		// 3e00001485f81000
    	ADDV	$65536, R4		// 1e02001484f81000
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Nov 27 00:46:52 UTC 2025
    - 5.6K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/arm64.s

    #include "../../../../../runtime/textflag.h"
    
    TEXT	foo(SB), DUPOK|NOSPLIT, $-8
    
    // arithmetic operations
    	ADDW	$1, R2, R3
    	ADDW	R1, R2, R3
    	ADDW	R1, ZR, R3
    	ADD	$1, R2, R3
    	ADD	R1, R2, R3
    	ADD	R1, ZR, R3
    	ADD	$1, R2, R3
    	ADDW	$1, R2
    	ADDW	R1, R2
    	ADD	$1, R2
    	ADD	R1, R2
    	ADD	R1>>11, R2
    	ADD	R1<<22, R2
    	ADD	R1->33, R2
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Mon Nov 10 17:34:13 UTC 2025
    - 96.1K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/loong64enc1.s

    	SUB	R4, R5, R6		// a6101100
    	SUBW	R4, R5, R6		// a6101100
    	SUBV	R4, R5, R6		// a6901100
    	ADD	R4, R5, R6		// a6101000
    	ADDW	R4, R5, R6		// a6101000
    	ADDV	R4, R5, R6		// a6901000
    	AND	R4, R5, R6		// a6901400
    	SUB	R4, R5			// a5101100
    	SUBW	R4, R5			// a5101100
    	SUBV	R4, R5			// a5901100
    	ADD	R4, R5			// a5101000
    	ADDW	R4, R5			// a5101000
    	ADDV	R4, R5			// a5901000
    	AND	R4, R5			// a5901400
    	NEGW	R4, R5			// 05101100
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Nov 27 00:46:52 UTC 2025
    - 44.5K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/testdata/arm64error.s

    	NEGSW	R7<<33, R5                                       // ERROR "shift amount out of range 0 to 31"
    	ADD	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"
    	ADDW	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"
    	ADDS	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Tue Oct 14 19:00:00 UTC 2025
    - 38.4K bytes
    - Viewed (0)
  6. src/cmd/asm/internal/asm/testdata/riscv64.s

    	SRLIW	$1, X5, X6				// 1bd31200
    	SRAIW	$1, X5, X6				// 1bd31240
    	ADDW	X5, X6, X7				// bb035300
    	SLLW	X5, X6, X7				// bb135300
    	SRLW	X5, X6, X7				// bb535300
    	SUBW	X5, X6, X7				// bb035340
    	SRAW	X5, X6, X7				// bb535340
    	ADDIW	$1, X6					// 1b031300
    	SLLIW	$1, X6					// 1b131300
    	SRLIW	$1, X6					// 1b531300
    	SRAIW	$1, X6					// 1b531340
    	ADDW	X5, X7					// bb835300
    	SLLW	X5, X7					// bb935300
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Nov 13 12:17:37 UTC 2025
    - 73.7K bytes
    - Viewed (0)
  7. lib/fips140/v1.1.0-rc1.zip

    or equal to the dst size. MOVD dst_len+40(FP), R4 CMP R0, R4 BGT crash MOVD R2, R4 MOVD R2, R6 MOVD R2, R8 MOVD R3, R5 MOVD R3, R7 MOVD R3, R9 ADDW $1, R5 ADDW $2, R7 ADDW $3, R9 incr: CMP R0, $64 BLT tail STMG R2, R9, (R1) ADDW $4, R3 ADDW $4, R5 ADDW $4, R7 ADDW $4, R9 MOVD $64(R1), R1 SUB $64, R0 BR incr tail: CMP R0, $0 BEQ crypt STMG R2, R3, (R1) ADDW $1, R3 MOVD $16(R1), R1 SUB $16, R0 BR tail crypt: STMG R2, R3, (R12) // update next counter value MOVD fn+0(FP), R0 // function code (encryption)...
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Dec 11 16:27:41 UTC 2025
    - 663K bytes
    - Viewed (0)
Back to top