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src/cmd/asm/internal/asm/testdata/s390x.s
LAXG R10, R11, (R12) // ebbac00000e7 LAO R1, R2, (R3) // eb21300000f6 LAOG R4, R5, (R6) // eb54600000e6 // load and store multiple LMG n-8(SP), R3, R4 // eb34f0100004 LMG -5(R5), R3, R4 // eb345ffbff04 LMY n-8(SP), R3, R4 // 9834f010 LMY 4096(R1), R3, R4 // eb3410000198 STMG R1, R2, n-8(SP) // eb12f0100024
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Wed Sep 18 15:49:24 UTC 2024 - 22.1K bytes - Viewed (0) -
doc/asm.html
</p> <p> Load- and store-multiple instructions operate on a range of registers. The range of registers is specified by a start register and an end register. For example, <code>LMG</code> <code>(R9),</code> <code>R5,</code> <code>R7</code> would load <code>R5</code>, <code>R6</code> and <code>R7</code> with the 64-bit values at <code>0(R9)</code>, <code>8(R9)</code> and <code>16(R9)</code> respectively. </p>
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Nov 28 19:15:27 UTC 2023 - 36.3K bytes - Viewed (0)