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Results 1 - 3 of 3 for LDXPW (0.02 sec)

  1. src/cmd/asm/internal/asm/testdata/arm64error.s

    	LDP	(R1), (R2, R2)                                   // ERROR "constrained unpredictable behavior"
    	LDP	(R0), (F0, F1)                                   // ERROR "invalid register pair"
    	LDXPW	(RSP), (R2, R2)                                  // ERROR "constrained unpredictable behavior"
    	LDAXPW	(R5), (R2, R2)                                   // ERROR "constrained unpredictable behavior"
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 37.8K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/arm64enc.s

    	//TODO LDURSB 0x96(R9), R7                 // 27618938
    	//TODO LDURSH -0x49(R11), R28              // 7c71db78
    	//TODO LDURSH -0x1f(R0), R29               // 1d109e78
    	//TODO LDURSW 0x48(R6), R20                // d48084b8
    	LDXPW (R24), (R23, R11)                    // 172f7f88
    	LDXP (R0), (R16, R13)                      // 10347fc8
    	LDXRW (RSP), R30                           // fe7f5f88
    	LDXR (R27), R12                            // 6c7f5fc8
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Mon Jul 24 01:11:41 UTC 2023
    - 43.9K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/arm64.s

    	LDARH	(R5), R7                             // a7fcdf48
    	LDAXPW	(R10), (R20, R16)                    // 54c17f88
    	LDAXP	(R25), (R30, R11)                    // 3eaf7fc8
    	LDAXRW	(R0), R2                             // 02fc5f88
    	LDXPW	(R24), (R23, R11)                    // 172f7f88
    	LDXP	(R0), (R16, R13)                     // 10347fc8
    	STLRB	R11, (R22)                           // cbfe9f08
    	STLRH	R16, (R23)                           // f0fe9f48
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Jul 24 18:45:14 UTC 2024
    - 95.2K bytes
    - Viewed (0)
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