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Results 1 - 10 of 16 for regQ (0.02 seconds)
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src/test/java/jcifs/internal/witness/WitnessIntegrationTest.java
assertTrue(mockService.hasRegistration(reg1)); assertTrue(mockService.hasRegistration(reg2)); assertTrue(mockService.hasRegistration(reg3)); // Unregister one assertTrue(mockService.unregisterWitness(reg2)); assertEquals(2, mockService.getRegistrationCount()); assertFalse(mockService.hasRegistration(reg2)); // Clean up remaining
Created: Sun Apr 05 00:10:12 GMT 2026 - Last Modified: Sat Aug 23 09:06:40 GMT 2025 - 9.8K bytes - Click Count (0) -
src/cmd/asm/internal/asm/parse.go
// Expect (SB), (FP), (PC), or (SP) p.get('(') reg := p.get(scanner.Ident).String() p.get(')') p.setPseudoRegister(a, reg, isStatic, prefix) } // setPseudoRegister sets the NAME field of addr for a pseudo-register reference such as (SB). func (p *Parser) setPseudoRegister(addr *obj.Addr, reg string, isStatic bool, prefix rune) { if addr.Reg != 0 { p.errorf("internal error: reg %s already set in pseudo", reg) } switch reg {
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Tue Feb 17 19:57:47 GMT 2026 - 37.3K bytes - Click Count (0) -
src/cmd/asm/internal/arch/loong64.go
func Loong64RegisterExtension(a *obj.Addr, ext string, reg, num int16, isAmount, isIndex bool) error { var ok bool var arngType int16 var simdType int16 var simdReg int16 switch { case reg >= loong64.REG_V0 && reg <= loong64.REG_V31: simdType = loong64.LSX simdReg = reg - loong64.REG_V0 case reg >= loong64.REG_X0 && reg <= loong64.REG_X31: simdType = loong64.LASX simdReg = reg - loong64.REG_X0 default:
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Sat Feb 14 15:17:33 GMT 2026 - 3.9K bytes - Click Count (0) -
src/test/java/jcifs/internal/witness/MockWitnessService.java
// Count how many registrations this affects int affectedRegistrations = 0; for (MockRegistration reg : registrations.values()) { if (reg.shareName.equalsIgnoreCase(resourceName) || reg.serverAddress.equals(resourceName)) { affectedRegistrations++; } }Created: Sun Apr 05 00:10:12 GMT 2026 - Last Modified: Sat Aug 23 09:06:40 GMT 2025 - 8.2K bytes - Click Count (0) -
src/cmd/asm/internal/asm/asm.go
// the CR bit. prog.Reg = a[1].Reg if a[1].Type != obj.TYPE_REG { // The CR bit is represented as a constant 0-31. Convert it to a Reg. c := p.getConstant(prog, op, &a[1]) reg, success := ppc64.ConstantToCRbit(c) if !success { p.errorf("invalid CR bit register number %d", c) } prog.Reg = reg } break }Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Fri Mar 20 17:02:17 GMT 2026 - 27.5K bytes - Click Count (0) -
src/test/java/jcifs/internal/witness/WitnessClientTest.java
WitnessRegisterResponse mockResponse = mock(WitnessRegisterResponse.class); lenient().when(mockResponse.isSuccess()).thenReturn(true); lenient().when(mockResponse.getRegistrationId()).thenReturn("test-reg-123"); WitnessRpcClient mockRpc = mock(WitnessRpcClient.class); lenient().when(mockRpc.register(any(WitnessRegisterRequest.class))).thenReturn(mockResponse);
Created: Sun Apr 05 00:10:12 GMT 2026 - Last Modified: Sat Aug 23 09:06:40 GMT 2025 - 9.8K bytes - Click Count (0) -
src/cmd/asm/internal/arch/arm64.go
} // ARM64RegisterShift constructs an ARM64 register with shift operation. func ARM64RegisterShift(reg, op, count int16) (int64, error) { // the base register of shift operations must be general register. if reg > arm64.REG_R31 || reg < arm64.REG_R0 { return 0, errors.New("invalid register for shift operation") } return int64(reg&31)<<16 | int64(op)<<22 | int64(uint16(count)), nil }
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Fri Mar 20 17:02:17 GMT 2026 - 6K bytes - Click Count (0) -
src/main/java/jcifs/internal/witness/WitnessRegistration.java
} /** * Generates a unique registration ID. * * @return a unique registration identifier */ private String generateRegistrationId() { return "REG-" + System.currentTimeMillis() + "-" + Integer.toHexString(System.identityHashCode(this)); } /** * Gets the next sequence number for this registration. * * @return the next sequence numberCreated: Sun Apr 05 00:10:12 GMT 2026 - Last Modified: Mon Aug 25 14:34:10 GMT 2025 - 6.7K bytes - Click Count (0) -
src/cmd/asm/internal/arch/arch.go
register[s] = int16(i + x86.REG_AL) } // Pseudo-registers. register["SB"] = RSB register["FP"] = RFP register["PC"] = RPC if linkArch == &x86.Linkamd64 { // Alias g to R14 register["g"] = x86.REGG } // Register prefix not used on this architecture. instructions := make(map[string]obj.As) for i, s := range obj.Anames { instructions[s] = obj.As(i) } for i, s := range x86.Anames {
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Fri Mar 20 17:02:17 GMT 2026 - 22K bytes - Click Count (0) -
cmd/iam-object-store.go
} } regUsersList = regUsersList[count:] } if took := time.Since(regUsersLoadStartTime); took > maxIAMLoadOpTime { actualLoaded := len(cache.iamUsersMap) logger.Info("Reg. users load took %.2fs (for %d items with %d expired items)", took.Seconds(), len(regUsersList), len(regUsersList)-actualLoaded) } bootstrapTraceMsgFirstTime("loading regular IAM groups")
Created: Sun Apr 05 19:28:12 GMT 2026 - Last Modified: Fri Aug 29 02:39:48 GMT 2025 - 26.6K bytes - Click Count (0)