ADDV	$8, R21

	MOVV	(R20), R30
	ADDV	$8, R20
	MOVV	R30, (R21)
	ADDV	$8, R21

	MOVV	(R20), R30
	ADDV	$8, R20
	MOVV	R30, (R21)
	ADDV	$8, R21

	MOVV	(R20), R30
	ADDV	$8, R20
	MOVV	R30, (R21)
	ADDV	$8, R21

	MOVV	(R20), R30
	ADDV	$8, R20
	MOVV	R30, (R21)
	ADDV	$8, R21

	MOVV	(R20), R30
	ADDV	$8, R20
	MOVV	R30, (R21)
	ADDV	$8, R21

	MOVV	(R20), R30

less4:
	CMP   R5, $2
	BLT   less2
	MOVHZ (R4), R21
	SLD   R22, R21, R21
	OR    R16, R21, R16
	ADD   $16, R22
	ADD   $-2, R5
	ADD   $2, R4

less2:
	CMP   R5, $0
	BEQ   insert1
	MOVBZ (R4), R21
	SLD   R22, R21, R21
	OR    R16, R21, R16
	ADD   $8, R22

insert1:
	// Insert 1 at end of msg
	MOVD $1, R21
	SLD  R22, R21, R21
	OR   R16, R21, R16

carry:

				{1, 670826495}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30
			},
			outputs: []outputInfo{
				{1, 0},
				{0, 670826495}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30
			},
		},
	},
	{

	MOVD	g_m(g), R21	// R21 = m

	MOVD	$0, R3		// CLOCK_REALTIME

	MOVD	runtime·vdsoClockgettimeSym(SB), R12	// Check for VDSO availability
	CMP	R12, $0
	BEQ	fallback

	// Set vdsoPC and vdsoSP for SIGPROF traceback.
	// Save the old values on stack and restore them on exit,
	// so this function is reentrant.
	MOVD	m_vdsoPC(R21), R4
	MOVD	m_vdsoSP(R21), R5
	MOVD	R4, 32(R1)
	MOVD	R5, 40(R1)

	XOR	R21,R24,R21	// xor done R24
	MOVWZ	(R10)(R8),R25	// tab[4][crc>>24]
	RLDICL	$48,R7,$56,R24	// crc>>16&0xFF
	XOR	R21,R25,R21	// xor done R25
	ADD	$1024,R10,R10	// &tab[5]
	SLD	$2,R24,R24	// crc>>16&0xFF*4
	MOVWZ	(R10)(R24),R26	// tab[5][crc>>16&0xFF]
	XOR	R21,R26,R21	// xor done R26
	RLDICL	$56,R7,$56,R25	// crc>>8
	ADD	$1024,R10,R10	// &tab[6]
	SLD	$2,R25,R25	// crc>>8&FF*2
	MOVBZ   R7,R26          // crc&0xFF

loop:
	MOVD    8(R8), R20        // R20 = x[i]
	MOVD    16(R8), R21       // R21 = x[i+1]
	MOVD    24(R8), R22       // R22 = x[i+2]
	MOVDU   32(R8), R23       // R23 = x[i+3]
	MULLD   R9, R20, R24      // R24 = z0[i]
	MULHDU  R9, R20, R20      // R20 = z1[i]
	ADDC    R4, R24           // R24 = z0[i] + c
	MULLD   R9, R21, R25
	MULHDU  R9, R21, R21
	ADDE    R20, R25
	MULLD   R9, R22, R26
	MULHDU  R9, R22, R22

        // sanity checks
        assertNotSame(a1, a2);
        assertNotSame(lr1, lr2);
        assertNotSame(rr1, rr2);

        DefaultMavenMetadataCache.CacheKey k1 =
                new DefaultMavenMetadataCache.CacheKey(a1, false, lr1, Collections.singletonList(rr1));
        DefaultMavenMetadataCache.CacheKey k2 =
                new DefaultMavenMetadataCache.CacheKey(a2, false, lr2, Collections.singletonList(rr2));

	AND $0x7ffffffffffff, R3, R13
	AND $0x7ffffffffffff, R4, R14

	ADD R0>>51, R11, R11
	ADD R1>>51, R12, R12
	ADD R2>>51, R13, R13
	ADD R3>>51, R14, R14
	// R4>>51 * 19 + R10 -> R10
	LSR $51, R4, R21
	MOVD $19, R22
	MADD R22, R10, R21, R10

	STP (R10, R11), 0(R20)
	STP (R12, R13), 16(R20)
	MOVD R14, 32(R20)

	LSL	R4, R6, R20
	LSR	R3, R6
	ORR	R8, R20
	LSL	R4, R7, R21
	LSR	R3, R7, R8
	ORR	R6, R21
	STP.P	(R20, R21), 16(R0)
	SUB	$2, R1
loop:
	CBZ	R1, done
	LDP.P	32(R2), (R10, R11)
	LDP	-16(R2), (R12, R13)
	LSL	R4, R10, R20
	LSR	R3, R10
	ORR	R8, R20		// z[i] = (x[i] >> s) | (x[i+1] << (64 - s))
	LSL	R4, R11, R21
	LSR	R3, R11
	ORR	R10, R21
	LSL	R4, R12, R22
	LSR	R3, R12
	ORR	R11, R22

func copyARM64(w io.Writer) {
	// R20: ptr to source memory
	// R21: ptr to destination memory
	// R26, R27 (aka REGTMP): scratch space
	// R20 and R21 are updated as a side effect
	fmt.Fprintln(w, "TEXT runtime·duffcopy<ABIInternal>(SB), NOSPLIT|NOFRAME, $0-0")

	for i := 0; i < 64; i++ {
		fmt.Fprintln(w, "\tLDP.P\t16(R20), (R26, R27)")
		fmt.Fprintln(w, "\tSTP.P\t(R26, R27), 16(R21)")
		fmt.Fprintln(w)
	}
	fmt.Fprintln(w, "\tRET")