R8L:  "%r8d",
	R9L:  "%r9d",
	R10L: "%r10d",
	R11L: "%r11d",
	R12L: "%r12d",
	R13L: "%r13d",
	R14L: "%r14d",
	R15L: "%r15d",
	RAX:  "%rax",
	RCX:  "%rcx",
	RDX:  "%rdx",
	RBX:  "%rbx",
	RSP:  "%rsp",
	RBP:  "%rbp",
	RSI:  "%rsi",
	RDI:  "%rdi",
	R8:   "%r8",
	R9:   "%r9",
	R10:  "%r10",
	R11:  "%r11",
	R12:  "%r12",
	R13:  "%r13",
	R14:  "%r14",
	R15:  "%r15",

	R9B:  "R9B",
	R10B: "R10B",
	R11B: "R11B",
	R12B: "R12B",
	R13B: "R13B",
	R14B: "R14B",
	R15B: "R15B",
	AX:   "AX",
	CX:   "CX",
	BX:   "BX",
	DX:   "DX",
	SP:   "SP",
	BP:   "BP",
	SI:   "SI",
	DI:   "DI",
	R8W:  "R8W",
	R9W:  "R9W",
	R10W: "R10W",
	R11W: "R11W",
	R12W: "R12W",
	R13W: "R13W",
	R14W: "R14W",
	R15W: "R15W",
	EAX:  "EAX",
	ECX:  "ECX",

	MOVD 172(R13), F14
	MOVD 164(R13), F13
	MOVD 156(R13), F12
	MOVD 148(R13), F11
	MOVD 140(R13), F10
	MOVD 132(R13), F9
	MOVD 124(R13), F8
	MOVD 116(R13), F7
	MOVD 108(R13), F6
	MOVD 100(R13), F5
	MOVD 92(R13), F4
	MOVD 84(R13), F3
	MOVD 76(R13), F2
	MOVD 68(R13), F1
	MOVD 60(R13), F0
	MOVW 56(R13), R0
	MOVW R0, FPCR
nofp2:
	MOVW 52(R13), R0
	MOVW R0, CPSR
	MOVW 48(R13), R12
	MOVW 44(R13), R11

	CMP     $0, R11
	BNE     skipfprest
	MOVD	(13*4+8*1)(R13), F8
	MOVD	(13*4+8*2)(R13), F9
	MOVD	(13*4+8*3)(R13), F10
	MOVD	(13*4+8*4)(R13), F11
	MOVD	(13*4+8*5)(R13), F12
	MOVD	(13*4+8*6)(R13), F13
	MOVD	(13*4+8*7)(R13), F14
	MOVD	(13*4+8*8)(R13), F15

skipfprest:
	MOVW.P	4(R13), R14
	MOVM.IAW	(R13), [R0, R1, R3, R4, R5, R6, R7, R8, R9, g, R11, R12]
	ADD	$(8*9), R13

	SHA512ROUND1(23, 0x76f988da831153b5, R9, R10, R11, R12, R13, R14, R15, R8)
	SHA512ROUND1(24, 0x983e5152ee66dfab, R8, R9, R10, R11, R12, R13, R14, R15)
	SHA512ROUND1(25, 0xa831c66d2db43210, R15, R8, R9, R10, R11, R12, R13, R14)
	SHA512ROUND1(26, 0xb00327c898fb213f, R14, R15, R8, R9, R10, R11, R12, R13)
	SHA512ROUND1(27, 0xbf597fc7beef0ee4, R13, R14, R15, R8, R9, R10, R11, R12)

	AMANDV		R14, (R13), R12 // acb96238
	AMORW		R14, (R13), R12 // ac396338
	AMORV		R14, (R13), R12 // acb96338
	AMXORW		R14, (R13), R12 // ac396438
	AMXORV		R14, (R13), R12 // acb96438
	AMMAXW		R14, (R13), R12 // ac396538
	AMMAXV		R14, (R13), R12 // acb96538
	AMMINW		R14, (R13), R12 // ac396638
	AMMINV		R14, (R13), R12 // acb96638
	AMMAXWU		R14, (R13), R12 // ac396738
	AMMAXVU		R14, (R13), R12 // acb96738

	MOVQ   R12, R11
	SHRQ   $0x33, R11
	MOVQ   R14, R13
	SHRQ   $0x33, R13
	ANDQ   AX, SI
	IMUL3Q $0x13, R13, R13
	ADDQ   R13, SI
	ANDQ   AX, R8
	ADDQ   BX, R8
	ANDQ   AX, R10
	ADDQ   DI, R10
	ANDQ   AX, R12
	ADDQ   R9, R12
	ANDQ   AX, R14
	ADDQ   R11, R14

	// Store output
	MOVQ out+0(FP), AX
	MOVQ SI, (AX)
	MOVQ R8, 8(AX)
	MOVQ R10, 16(AX)
	MOVQ R12, 24(AX)

	MOVW	R4, 12(R13)
	MOVW	R5, 16(R13)
	MOVW	R6, 20(R13)
	MOVW	R7, 24(R13)
	MOVW	R8, 28(R13)
	MOVW	g, 32(R13)
	MOVW	R11, 36(R13)

	// Skip floating point registers on goarmsoftfp != 0.
	MOVB    runtime·goarmsoftfp(SB), R11
	CMP	$0, R11
	BNE     skipfpsave
	MOVD	F8, (40+8*0)(R13)
	MOVD	F9, (40+8*1)(R13)
	MOVD	F10, (40+8*2)(R13)
	MOVD	F11, (40+8*3)(R13)
	MOVD	F12, (40+8*4)(R13)

				{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
			},
		},
	},
	{
		name:   "CMPW",
		argLen: 2,
		asm:    x86.ACMPW,
		reg: regInfo{
			inputs: []inputInfo{
				{0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
				{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
			},
		},
	},
	{

TEXT ·useVFPv3(SB),NOSPLIT,$0
	WORD $0xeeb70b00	// vmov.f64 d0, #112
	RET

// try to run ARMv6K (or above) "ldrexd" instruction
TEXT ·useARMv6K(SB),NOSPLIT,$32
	MOVW R13, R2
	BIC  $15, R13
	WORD $0xe1bd0f9f	// ldrexd r0, r1, [sp]
	WORD $0xf57ff01f	// clrex
	MOVW R2, R13