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Results 1 - 10 of 13 for op_begin (0.12 sec)
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tensorflow/compiler/mlir/quantization/common/uniform_quantized_types_test.cc
ASSERT_TRUE(module_op); auto func_op = module_op->lookupSymbol<func::FuncOp>("fully_quantized_add"); ASSERT_THAT(func_op, NotNull()); auto add_op_itr = func_op.getBody().op_begin<mlir::stablehlo::AddOp>(); ASSERT_THAT(add_op_itr, Ne(func_op.getBody().op_end<mlir::stablehlo::AddOp>())); EXPECT_TRUE(IsOpFullyQuantized(*add_op_itr)); }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 28.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/cluster_outlining.cc
// Replace uses of live-in values within cluster_op region with function // arguments. Region& op_region = op.getBody(); for (auto p : llvm::zip(live_ins, outlined_func_block->getArguments())) { replaceAllUsesInRegionWith(std::get<0>(p), std::get<1>(p), op_region); } // Move all instructions in cluster_op into outlined_function's only block. auto& op_body = op.GetBody().getOperations();
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Apr 30 21:25:12 UTC 2024 - 7.2K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/list7.go
obj.RegisterOpcode(obj.ABaseARM64, Anames) obj.RegisterRegisterList(obj.RegListARM64Lo, obj.RegListARM64Hi, rlconv) obj.RegisterOpSuffix("arm64", obj.CConvARM) obj.RegisterSpecialOperands(int64(SPOP_BEGIN), int64(SPOP_END), SPCconv) } func arrange(a int) string { switch a { case ARNG_8B: return "B8" case ARNG_16B: return "B16" case ARNG_4H: return "H4" case ARNG_8H: return "H8"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Oct 18 17:56:30 UTC 2023 - 6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tf_traits.h
Type type = op->getResult(0).getType(); // Verify that the first result type is same as the rest of the results. // We skip the comparison against itself. for (auto result_type : llvm::drop_begin(op->getResultTypes(), 1)) { if (!mlir::tf_type::HasCompatibleElementTypes(type, result_type)) return op->emitOpError() << "requires all return types to have compatible element types"; }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 12.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/decompose_optionals.cc
PatternRewriter& rewriter) const { bool changed = false; rewriter.startOpModification(branch); for (auto [call_arg, body_arg] : llvm::zip(llvm::drop_begin(ifop.getOperation()->getOperands()), branch.getBody().front().getArguments())) { if (call_arg.getType() != body_arg.getType()) { body_arg.setType(call_arg.getType()); changed = true;
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jun 12 21:18:05 UTC 2024 - 9.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/tpu_dynamic_layout_pass.cc
llvm::SmallVector<tf_device::LaunchOp, 4> execute_launches; execute_launches.reserve(compile_launch.getNumResults() - 1); for (Value program_result : llvm::drop_begin(compile_launch.getResults(), 1)) { if (!program_result.hasOneUse()) return; Operation* user = *program_result.user_begin(); auto execute = llvm::dyn_cast<TF::TPUExecuteOp>(user);
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 12.7K bytes - Viewed (0) -
src/cmd/vendor/github.com/google/pprof/internal/report/source.go
fmt.Fprintf(os.Stderr, "Failed to compute objdump address for range end %x: %v\n", r.end, err) continue } base := r.begin - objBegin insts, err := sp.objectTool.Disasm(r.mapping.File, objBegin, objEnd, rpt.options.IntelSyntax) if err != nil { // TODO(sanjay): Report that the covered addresses are missing. continue } var lastFrames []plugin.Frame var lastAddr, maxAddr uint64
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 31 19:48:28 UTC 2024 - 31.3K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/a.out.go
ARNG_D ) //go:generate stringer -type SpecialOperand -trimprefix SPOP_ type SpecialOperand int const ( // PRFM SPOP_PLDL1KEEP SpecialOperand = iota // must be the first one SPOP_BEGIN SpecialOperand = iota - 1 // set as the lower bound SPOP_PLDL1STRM SPOP_PLDL2KEEP SPOP_PLDL2STRM SPOP_PLDL3KEEP SPOP_PLDL3STRM SPOP_PLIL1KEEP SPOP_PLIL1STRM SPOP_PLIL2KEEP
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Oct 18 17:56:30 UTC 2023 - 18.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/tensor_list_ops_decomposition.cc
} const bool arg_no_changed = branch_maps.front().empty(); auto output_buffer_to_size = ModifyFunctionReturn(branches.front(), branch_maps.front()); for (const auto& pair : llvm::drop_begin(llvm::zip(branches, branch_maps), 1)) ModifyFunctionReturn(std::get<0>(pair), std::get<1>(pair)); if (output_buffer_to_size.empty() && arg_no_changed) return success(); // Recreate the op.
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 39.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tf_ops_a_m.cc
if (!concat_dim_attr || concat_dim_attr.getType().getRank() != 0) return failure(); llvm::SmallVector<DenseIntElementsAttr, 4> shapes; shapes.reserve(operands.size() - 1); for (Attribute shape : llvm::drop_begin(operands, 1)) if (auto shape_attr = mlir::dyn_cast_or_null<DenseIntElementsAttr>(shape)) shapes.push_back(shape_attr); else return failure();
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 146.7K bytes - Viewed (0)