enum InstructionSet { X86, ITANIUM, PPC, SPARC, ARM }

    @Internal
    boolean isI386();

    @Internal
    boolean isAmd64();

    @Internal
    boolean isIa64();

    @Internal
    default boolean isArm() {
        return isArm32() || isArm64();
    }

    @Internal
    boolean isArm32();

    @Internal
    boolean isArm64();

        return Architectures.X86.isAlias(name);
    }

    @Override
    public boolean isAmd64() {
        return Architectures.X86_64.isAlias(name);
    }

    @Override
    public boolean isIa64() {
        return Architectures.IA_64.isAlias(name);
    }

    @Override
    public boolean isArm32() {
        return Architectures.ARM_V7.isAlias(name);
    }

    @Override

        if (platform.getArchitecture().isAmd64()) {
            return new LegacyPlatformWindowsSdk(BINPATHS_AMD64, LIBPATHS_AMD64);
        }
        if (platform.getArchitecture().isIa64()) {
            return new LegacyPlatformWindowsSdk(BINPATHS_IA64, LIBPATHS_IA64);
        }
        if (platform.getArchitecture().isArm()) {
            return new LegacyPlatformWindowsSdk(BINPATHS_ARM, LIBPATHS_ARM);

        expect:
        arch.name == name
        arch.i386 == i386
        arch.amd64 == amd64
        arch.ia64 == ia64
        arch.arm == arm || arm64
        arch.arm32 == arm
        arch.arm64 == arm64

        where:
        name        | i386  | amd64 | ia64  | arm   | arm64
        "x86"       | true  | false | false | false | false
        "x86-64"    | false | true  | false | false | false

            definitions.put(DEFINE_ARMPARTITIONAVAILABLE, "1");
            return definitions;
        }
    },

    // Host: x86
    // Target: ia64
    // (ia64 is no longer supported on later versions of Visual Studio)
    LEGACY_IA64_ON_X86("ia64", "bin/x86_ia64", "lib/ia64", "ias.exe")  {
        @Override
        File getCrossCompilePath(File basePath) {
            return LEGACY_X86_ON_X86.getBinPath(basePath);
        }

        ArchitectureInternal x86 = Architectures.forInput(ARCH_X86);
        ArchitectureInternal x64 = Architectures.forInput("x86_64");
        ArchitectureInternal ia64 = Architectures.forInput("ia64");
        ArchitectureInternal armv7 = Architectures.forInput("armv7");
        ArchitectureInternal aarch64 = Architectures.forInput("aarch64");
        ArchitectureInternal sparc = Architectures.forInput("sparc");

  if (type.isF16()) {
    *dtype = DT_HALF;
    return absl::OkStatus();
  } else if (type.isF32()) {
    *dtype = DT_FLOAT;
    return absl::OkStatus();
  } else if (type.isF64()) {
    *dtype = DT_DOUBLE;
    return absl::OkStatus();
  } else if (type.isBF16()) {
    *dtype = DT_BFLOAT16;
    return absl::OkStatus();
  } else if (type.isFloat8E4M3FN()) {
    *dtype = DT_FLOAT8_E4M3FN;

	resolveRnglistx := func(rnglistsBase, off uint64) uint64 {
		is64, _ := b.format.dwarf64()
		if is64 {
			off *= 8
		} else {
			off *= 4
		}
		off += rnglistsBase
		if uint64(int(off)) != off {
			b.error("DW_FORM_rnglistx offset out of range")
		}

		b1 := makeBuf(b.dwarf, b.format, "rnglists", 0, b.dwarf.rngLists)
		b1.skip(int(off))
		if is64 {
			off = b1.uint64()
		} else {

    if (complex_element_ty.isF32()) {
      return DenseElementsAttr::get(
          scalar_ty, static_cast<std::complex<float>>(raw_value));
    } else if (complex_element_ty.isF64()) {
      return DenseElementsAttr::get(
          scalar_ty, static_cast<std::complex<double>>(raw_value));
    }
  }
  llvm_unreachable("unsupported type");
}

  } else if (type.isF64()) {
    return tflite::TensorType_FLOAT64;
  } else if (mlir::isa<mlir::TF::StringType>(type)) {
    return tflite::TensorType_STRING;
  } else if (auto complex_type = mlir::dyn_cast<mlir::ComplexType>(type)) {
    if (complex_type.getElementType().isF32()) {
      return tflite::TensorType_COMPLEX64;
    } else if (complex_type.getElementType().isF64()) {
      return tflite::TensorType_COMPLEX128;