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Results 1 - 10 of 38 for armv7 (0.09 sec)
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platforms/native/platform-native/src/main/java/org/gradle/nativeplatform/platform/internal/NativePlatforms.java
ArchitectureInternal x64 = Architectures.forInput("x86_64"); ArchitectureInternal ia64 = Architectures.forInput("ia64"); ArchitectureInternal armv7 = Architectures.forInput("armv7"); ArchitectureInternal aarch64 = Architectures.forInput("aarch64"); ArchitectureInternal sparc = Architectures.forInput("sparc");
Registered: Wed Jun 12 18:38:38 UTC 2024 - Last Modified: Thu Nov 16 20:20:03 UTC 2023 - 4.7K bytes - Viewed (0) -
platforms/native/platform-native/src/main/java/org/gradle/nativeplatform/platform/internal/Architectures.java
public static final KnownArchitecture ARM_V7 = new KnownArchitecture("arm-v7", "armv7", "arm", "arm32"); public static final KnownArchitecture AARCH64 = new KnownArchitecture("aarch64", "arm-v8", "arm64"); private static final List<KnownArchitecture> KNOWN_ARCHITECTURES = asList( X86, X86_64, IA_64, ARM_V7, AARCH64, new KnownArchitecture("ppc"),
Registered: Wed Jun 12 18:38:38 UTC 2024 - Last Modified: Thu Nov 16 20:20:03 UTC 2023 - 2.7K bytes - Viewed (0) -
src/syscall/sockcmsg_unix_other.go
// kernels still require 32-bit aligned access to network // subsystem. if sizeofPtr == 8 { salign = 4 } case "netbsd", "openbsd": // NetBSD and OpenBSD armv7 require 64-bit alignment. if runtime.GOARCH == "arm" { salign = 8 } // NetBSD aarch64 requires 128-bit alignment. if runtime.GOOS == "netbsd" && runtime.GOARCH == "arm64" { salign = 16 } }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 28 18:17:57 UTC 2021 - 1.1K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/sys/unix/sockcmsg_unix_other.go
// kernels still require 32-bit aligned access to network // subsystem. if SizeofPtr == 8 { salign = 4 } case "netbsd", "openbsd": // NetBSD and OpenBSD armv7 require 64-bit alignment. if runtime.GOARCH == "arm" { salign = 8 } // NetBSD aarch64 requires 128-bit alignment. if runtime.GOOS == "netbsd" && runtime.GOARCH == "arm64" { salign = 16 }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 1.2K bytes - Viewed (0) -
platforms/native/platform-native/src/main/java/org/gradle/nativeplatform/platform/Architecture.java
* <td>Sparc</td> * <td>"sparc", "sparc32", "sparc-v8"</td> * <td>"sparc64", "ultrasparc", "sparc-v9"</td> * </tr> * <tr> * <td>ARM</td> * <td>"arm", "arm-v7", "armv7", "arm32"</td> * <td>"aarch64", "arm64", "arm-v8"</td> * </tr> * </table> */ @HasInternalProtocol public interface Architecture extends Named { @Override @Input String getName();
Registered: Wed Jun 12 18:38:38 UTC 2024 - Last Modified: Thu Nov 16 20:20:03 UTC 2023 - 1.9K bytes - Viewed (0) -
src/internal/runtime/atomic/sys_nonlinux_arm.s
//go:build !linux #include "textflag.h" // TODO(minux): this is only valid for ARMv6+ // bool armcas(int32 *val, int32 old, int32 new) // Atomically: // if(*val == old){ // *val = new; // return 1; // }else // return 0; TEXT ·Cas(SB),NOSPLIT,$0 JMP ·armcas(SB) // Non-linux OSes support only single processor machines before ARMv7. // So we don't need memory barriers if goarm < 7. And we fail loud at
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 25 19:53:03 UTC 2024 - 1.3K bytes - Viewed (0) -
src/internal/runtime/atomic/sys_linux_arm.s
MOVB R0, ret+12(FP) RET // As for cas, memory barriers are complicated on ARM, but the kernel // provides a user helper. ARMv5 does not support SMP and has no // memory barrier instruction at all. ARMv6 added SMP support and has // a memory barrier, but it requires writing to a coprocessor // register. ARMv7 introduced the DMB instruction, but it's expensive // even on single-core devices. The kernel helper takes care of all of // this for us.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 25 19:53:03 UTC 2024 - 2.8K bytes - Viewed (0) -
platforms/native/platform-native/src/test/groovy/org/gradle/nativeplatform/platform/internal/ArchitecturesTest.groovy
} def "test ARM aliases"() { expect: Architectures.forInput(architecture).isArm32() Architectures.forInput(architecture).isArm() where: architecture << [ "arm", "armv7" ] } def "test ARM 64 aliases"() { expect: Architectures.forInput(architecture).isArm64() Architectures.forInput(architecture).isArm() where:
Registered: Wed Jun 12 18:38:38 UTC 2024 - Last Modified: Thu Nov 16 20:20:03 UTC 2023 - 1.5K bytes - Viewed (0) -
src/internal/cpu/cpu_arm.go
} // HWCAP feature bits ARM.HasVFPv4 = isSet(HWCap, hwcap_VFPv4) ARM.HasIDIVA = isSet(HWCap, hwcap_IDIVA) // lpae is required to make the 64-bit instructions LDRD and STRD (and variants) atomic. // See ARMv7 manual section B1.6. // We also need at least a v7 chip, for the DMB instruction. ARM.HasV7Atomics = isSet(HWCap, hwcap_LPAE) && isV7(Platform) } func isSet(hwc uint, value uint) bool { return hwc&value != 0 }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Oct 31 20:38:55 UTC 2023 - 1.3K bytes - Viewed (0) -
src/cmd/link/testdata/pe-llvm/main.go
// have been created by llvm-rc or msvc's rc.exe, which means there's the // @feat.00 symbol as well as split .rsrc$00 and .rsrc$01 section to deal with. // // rsrc.syso is created using llvm with: // {i686,x86_64,armv7,arm64}-w64-mingw32-windres -i a.rc -o rsrc_$GOARCH.syso -O coff // where this windres calls into llvm-rc and llvm-cvtres. The source file, // a.rc, simply contains a reference to its own bytes: // // resname RCDATA a.rc //
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 26 18:15:09 UTC 2021 - 1.7K bytes - Viewed (0)