// 31.13.14: Vector Floating-Point Classify Instruction
	VFCLASSV	V2, V3				// d711284e
	VFCLASSV	V2, V0, V3			// d711284c

	// 31.13.15: Vector Floating-Point Merge Instruction
	VFMERGEVFM	F10, V2, V0, V3			// d751255c

	// 31.13.16: Vector Floating-Point Move Instruction
	VFMVVF		F10, V3				// d751055e

	// 31.13.17: Single-Width Floating-Point/Integer Type-Convert Instructions
	VFCVTXUFV	V2, V3				// d711204a

	MOVV		(R14)(R13), R12	// cc350c38

	// STX.{B,H,W,D} instructions
	MOVB		R12, (R14)(R13)	// cc351038
	MOVH		R12, (R14)(R13)	// cc351438
	MOVW		R12, (R14)(R13)	// cc351838
	MOVV		R12, (R14)(R13)	// cc351c38

	// FLDX.{S,D} instructions
	MOVF		(R14)(R13), F2	// c2353038
	MOVD		(R14)(R13), F2	// c2353438

	// FSTX.{S,D} instructions
	MOVF		F2, (R14)(R13)	// c2353838
	MOVD		F2, (R14)(R13)	// c2353c38

// one of the comparison instructions that require special handling.
func IsARM64ADR(op obj.As) bool {
	switch op {
	case arm64.AADR, arm64.AADRP:
		return true
	}
	return false
}

// IsARM64CMP reports whether the op (as defined by an arm64.A* constant) is
// one of the comparison instructions that require special handling.
func IsARM64CMP(op obj.As) bool {
	switch op {

			}
		} else if p.arch.Family == sys.Loong64 {
			if arch.IsLoong64RDTIME(op) {
				// The Loong64 RDTIME family of instructions is a bit special,
				// in that both its register operands are outputs
				prog.To = a[0]
				if a[1].Type != obj.TYPE_REG {
					p.errorf("invalid addressing modes for 2nd operand to %s instruction, must be register", op)
					return
				}
				prog.RegTo2 = a[1].Reg
				break
			}

            <phase>process-classes</phase>
            <goals>
              <goal>manifest</goal>
            </goals>
          </execution>
        </executions>
        <configuration>
          <instructions>
            <!-- Silence a warning that claims that META-INF/versions/9/... is the "wrong directory" for our classes. -->
            <_fixupmessages>^Classes found in the wrong directory: .*</_fixupmessages>

# SHA256 checksums of snapshot zip files in this directory.
# These checksums are included in the FIPS security policy
# (validation instructions sent to the lab) and MUST NOT CHANGE.
# That is, the zip files themselves must not change.
#
# It is okay to add new zip files to the list, and it is okay to
# remove zip files from the list when they are removed from
# this directory. To update this file:
#
#	go test cmd/go/internal/fips140 -update
#

            <phase>process-classes</phase>
            <goals>
              <goal>manifest</goal>
            </goals>
          </execution>
        </executions>
        <configuration>
          <instructions>
            <!-- Silence a warning that claims that META-INF/versions/9/... is the "wrong directory" for our classes. -->
            <_fixupmessages>^Classes found in the wrong directory: .*</_fixupmessages>

   
   
   *TensorFlow release binaries version 1.6 and higher are prebuilt with AVX instruction sets.*
   
   
   Therefore on any CPU that does not have these instruction sets, either CPU or GPU version of TF will fail to load.
   
   Apparently, your CPU model does not support AVX instruction sets. You can still use TensorFlow with the alternatives given below:
   
      * Try Google Colab to use TensorFlow.

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			</plugin>
			<plugin>
				<groupId>org.apache.felix</groupId>
				<artifactId>maven-bundle-plugin</artifactId>
				<version>6.0.0</version>
				<extensions>true</extensions>

				<configuration>
					<instructions>
						<Bundle-Version>${osgi.version}</Bundle-Version>
						<Bundle-License>LGPL</Bundle-License>
						<Bundle-Vendor>CodeLibs</Bundle-Vendor>
						<Bundle-SymbolicName>org.codelibs.jcifs</Bundle-SymbolicName>