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src/crypto/subtle/xor_amd64.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 26 18:14:32 UTC 2023 - 1.4K bytes - Viewed (0) -
maven-compat/src/test/java/org/apache/maven/project/path/DefaultPathTranslatorTest.java
String aligned = new DefaultPathTranslator().alignToBaseDirectory("${basedir}", basedir); assertEquals(basedir.getAbsolutePath(), aligned); } @Test void testAlignToBasedirWhereBasedirExpressionIsTheValuePrefix() { File basedir = new File(System.getProperty("java.io.tmpdir"), "test").getAbsoluteFile();
Registered: Wed Jun 12 09:55:16 UTC 2024 - Last Modified: Thu Apr 25 05:46:50 UTC 2024 - 2K bytes - Viewed (0) -
src/cmd/compile/internal/types2/sizes.go
// field's size. As with all element types, if the struct is used // in an array its size must first be aligned to a multiple of the // struct's alignment. // - All other types have size WordSize. // - Arrays and structs are aligned per spec definition; all other // types are naturally aligned with a maximum alignment MaxAlign. // // *StdSizes implements Sizes. type StdSizes struct {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 25 19:53:03 UTC 2024 - 8.8K bytes - Viewed (0) -
src/go/types/sizes.go
// field's size. As with all element types, if the struct is used // in an array its size must first be aligned to a multiple of the // struct's alignment. // - All other types have size WordSize. // - Arrays and structs are aligned per spec definition; all other // types are naturally aligned with a maximum alignment MaxAlign. // // *StdSizes implements Sizes. type StdSizes struct {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Apr 03 18:48:38 UTC 2024 - 8.9K bytes - Viewed (0) -
src/runtime/mpagealloc_64bit.go
// // The base address of the backing store is always page-aligned, // because it comes from the OS, so it's sufficient to align the // index. haveMin := s.min.Load() haveMax := s.max.Load() needMin := alignDown(uintptr(chunkIndex(base)), physPageSize/scSize) needMax := alignUp(uintptr(chunkIndex(limit)), physPageSize/scSize)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jan 03 11:00:10 UTC 2024 - 9.3K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/doc.go
PCALIGN also changes the function alignment. If a function has one or more PCALIGN directives, its address will be aligned to the same or coarser boundary, which is the maximum of all the alignment values. In the following example, the function Add is aligned with 128 bytes. Examples: TEXT ·Add(SB),$40-16 MOVD $2, R0 PCALIGN $32 MOVD $4, R1 PCALIGN $128 MOVD $8, R2 RET
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 07 00:21:42 UTC 2023 - 9.6K bytes - Viewed (0) -
src/runtime/mpallocbits.go
} // pages64 returns a 64-bit bitmap representing a block of 64 pages aligned // to 64 pages. The returned block of pages is the one containing the i'th // page in this pallocBits. Each bit represents whether the page is in-use. func (b *pallocBits) pages64(i uint) uint64 { return (*pageBits)(b).block64(i) } // allocPages64 allocates a 64-bit block of 64 pages aligned to 64 pages according
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat May 18 15:13:43 UTC 2024 - 12.5K bytes - Viewed (0) -
internal/ioutil/ioutil.go
// directio.AlignSize is defined as 0 in MacOS causing divide by 0 error. const DirectioAlignSize = 4096 // CopyAligned - copies from reader to writer using the aligned input // buffer, it is expected that input buffer is page aligned to // 4K page boundaries. Without passing aligned buffer may cause // this function to return error. // // This code is similar in spirit to io.Copy but it is only to be
Registered: Sun Jun 16 00:44:34 UTC 2024 - Last Modified: Wed May 22 23:07:14 UTC 2024 - 10.2K bytes - Viewed (0) -
src/runtime/memmove_loong64.s
SUBVU R5, R4, R7 AND $7, R7 BNE R7, out // if less than 8 bytes, do byte copying SGTU $8, R6, R7 BNE R7, out // do one byte at a time until 8-aligned AND $7, R4, R8 BEQ R8, words MOVB (R5), R7 ADDV $1, R5 MOVB R7, (R4) ADDV $1, R4 JMP -6(PC) words: // do 8 bytes at a time if there is room ADDV $-7, R9, R6 // R6 is end pointer-7
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 13 15:04:25 UTC 2024 - 1.8K bytes - Viewed (0) -
src/runtime/memclr_riscv64.s
MOV $8, X9 BLT X11, X9, check4 // Check alignment AND $7, X10, X5 BEQZ X5, aligned // Zero one byte at a time until we reach 8 byte alignment. SUB X5, X9, X5 SUB X5, X11, X11 align: SUB $1, X5 MOVB ZERO, 0(X10) ADD $1, X10 BNEZ X5, align aligned: // X9 already contains $8 BLT X11, X9, check4 MOV $16, X9 BLT X11, X9, zero8 MOV $32, X9
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Nov 09 13:57:06 UTC 2023 - 1.7K bytes - Viewed (0)