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Results 1 - 10 of 13 for Reg (0.03 sec)

  1. src/cmd/asm/internal/asm/parse.go

    	// Expect (SB), (FP), (PC), or (SP)
    	p.get('(')
    	reg := p.get(scanner.Ident).String()
    	p.get(')')
    	p.setPseudoRegister(a, reg, isStatic, prefix)
    }
    
    // setPseudoRegister sets the NAME field of addr for a pseudo-register reference such as (SB).
    func (p *Parser) setPseudoRegister(addr *obj.Addr, reg string, isStatic bool, prefix rune) {
    	if addr.Reg != 0 {
    		p.errorf("internal error: reg %s already set in pseudo", reg)
    	}
    	switch reg {
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Sep 04 18:16:59 UTC 2024
    - 36.9K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/asm.go

    			// the CR bit.
    			prog.Reg = a[1].Reg
    			if a[1].Type != obj.TYPE_REG {
    				// The CR bit is represented as a constant 0-31. Convert it to a Reg.
    				c := p.getConstant(prog, op, &a[1])
    				reg, success := ppc64.ConstantToCRbit(c)
    				if !success {
    					p.errorf("invalid CR bit register number %d", c)
    				}
    				prog.Reg = reg
    			}
    			break
    		}
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Mon Oct 21 14:11:44 UTC 2024
    - 25.5K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/arm.s

    // MULL r1,r2,(hi,lo)
    //
    //	LTYPEM cond reg ',' reg ',' regreg
    //	{
    //		outcode($1, $2, &$3, int32($5.Reg), &$7);
    //	}
    	MULL	R1, R2, (R3,R4)
    
    //
    // MULA r1,r2,r3,r4: (r1*r2+r3) & 0xffffffff . r4
    // MULAW{T,B} r1,r2,r3,r4
    //
    //	LTYPEN cond reg ',' reg ',' reg ',' spreg
    //	{
    //		$7.Type = obj.TYPE_REGREG2;
    //		$7.Offset = int64($9);
    //		outcode($1, $2, &$3, int32($5.Reg), &$7);
    //	}
    	MULAWT	R1, R2, R3, R4
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Dec 15 20:51:01 UTC 2023
    - 69K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/arch/arm.go

    		return true
    	}
    	return false
    }
    
    // IsARMBFX reports whether the op (as defined by an arm.A* constant) is one the
    // BFX-like instructions which are in the form of "op $width, $LSB, (Reg,) Reg".
    func IsARMBFX(op obj.As) bool {
    	switch op {
    	case arm.ABFX, arm.ABFXU, arm.ABFC, arm.ABFI:
    		return true
    	}
    	return false
    }
    
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Oct 23 15:18:14 UTC 2024
    - 6.1K bytes
    - Viewed (0)
  5. schema/constraint.go

    package schema
    
    import (
    	"regexp"
    	"strings"
    
    	"gorm.io/gorm/clause"
    )
    
    // reg match english letters and midline
    var regEnLetterAndMidline = regexp.MustCompile(`^[\w-]+$`)
    
    type CheckConstraint struct {
    	Name       string
    	Constraint string // length(phone) >= 10
    	*Field
    }
    
    func (chk *CheckConstraint) GetName() string { return chk.Name }
    
    func (chk *CheckConstraint) Build() (sql string, vars []interface{}) {
    Registered: Sun Nov 03 09:35:10 UTC 2024
    - Last Modified: Mon Mar 18 07:33:54 UTC 2024
    - 1.9K bytes
    - Viewed (0)
  6. cni/pkg/iptables/iptables.go

    	//
    	// All this is necessary because quite often apps use the same port for healthchecks as they do for reg. traffic, and
    	// we cannot make assumptions there.
    
    	// -A OUTPUT -m owner --socket-exists -p tcp -m set --match-set istio-inpod-probes dst,dst -j SNAT --to-source 169.254.7.127
    	iptablesBuilder.AppendRuleV4(
    Registered: Wed Nov 06 22:53:10 UTC 2024
    - Last Modified: Tue Oct 15 15:39:28 UTC 2024
    - 23.3K bytes
    - Viewed (0)
  7. cmd/iam-object-store.go

    				}
    			}
    
    			regUsersList = regUsersList[count:]
    		}
    
    		if took := time.Since(regUsersLoadStartTime); took > maxIAMLoadOpTime {
    			actualLoaded := len(cache.iamUsersMap)
    			logger.Info("Reg. users load took %.2fs (for %d items with %d expired items)", took.Seconds(),
    				len(regUsersList), len(regUsersList)-actualLoaded)
    		}
    
    		bootstrapTraceMsgFirstTime("loading regular IAM groups")
    Registered: Sun Nov 03 19:28:11 UTC 2024
    - Last Modified: Thu Oct 10 23:40:37 UTC 2024
    - 26.6K bytes
    - Viewed (0)
  8. src/cmd/asm/internal/arch/arch.go

    	for i := arm64.REG_V0; i <= arm64.REG_V31; i++ {
    		register[obj.Rconv(i)] = int16(i)
    	}
    
    	// System registers.
    	for i := 0; i < len(arm64.SystemReg); i++ {
    		register[arm64.SystemReg[i].Name] = arm64.SystemReg[i].Reg
    	}
    
    	register["LR"] = arm64.REGLINK
    
    	// Pseudo-registers.
    	register["SB"] = RSB
    	register["FP"] = RFP
    	register["PC"] = RPC
    	register["SP"] = RSP
    	// Avoid unintentionally clobbering g using R28.
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Thu Oct 24 12:32:56 UTC 2024
    - 21.5K bytes
    - Viewed (0)
  9. src/main/resources/fess_label_de.properties

    labels.name=Name
    labels.numOfThread=Anzahl Threads
    labels.duplicateHostName=Duplizierter Name
    labels.pageNumber=Seitennummer
    labels.password=Passwort
    labels.paths=Pfade
    labels.port=Port
    labels.regex=Reg. Ausdruck
    labels.regularName=Regulärer Name
    labels.replacement=Ersetzung
    labels.sessionId=Session-ID
    labels.sortOrder=Sortierreihenfolge
    labels.updatedBy=Aktualisiert von
    labels.updatedTime=Aktualisierungszeit
    Registered: Thu Oct 31 13:40:30 UTC 2024
    - Last Modified: Fri Mar 22 11:58:34 UTC 2024
    - 42.8K bytes
    - Viewed (0)
  10. migrator/migrator.go

    			if length > 0 && field.Size > 0 {
    				alterColumn = true
    			} else {
    				// has size in data type and not equal
    				// Since the following code is frequently called in the for loop, reg optimization is needed here
    				matches2 := regFullDataType.FindAllStringSubmatch(fullDataType, -1)
    				if !field.PrimaryKey &&
    					(len(matches2) == 1 && matches2[0][1] != fmt.Sprint(length) && ok) {
    					alterColumn = true
    Registered: Sun Nov 03 09:35:10 UTC 2024
    - Last Modified: Fri Apr 26 07:15:49 UTC 2024
    - 29K bytes
    - Viewed (0)
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