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Results 1 - 3 of 3 for R22 (0.09 sec)
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src/cmd/asm/internal/asm/testdata/arm64.s
MSR R6, APDBKeyHi_EL1 // 662218d5 MRS APDBKeyLo_EL1, R5 // 452238d5 MSR R22, APDBKeyLo_EL1 // 562218d5 MRS APGAKeyHi_EL1, R22 // 362338d5 MSR R5, APGAKeyHi_EL1 // 252318d5 MRS APGAKeyLo_EL1, R16 // 102338d5 MSR R22, APGAKeyLo_EL1 // 162318d5 MRS APIAKeyHi_EL1, R23 // 372138d5
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Mar 26 10:48:50 UTC 2025 - 95.3K bytes - Viewed (0) -
src/cmd/asm/internal/arch/arch.go
register[obj.Rconv(i)] = int16(i) } // Pseudo-registers. register["SB"] = RSB register["FP"] = RFP register["PC"] = RPC // Avoid unintentionally clobbering g using R22. delete(register, "R22") register["g"] = loong64.REG_R22 registerPrefix := map[string]bool{ "F": true, "FCSR": true, "FCC": true, "R": true, "V": true, "X": true, }
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Thu Nov 07 02:20:14 UTC 2024 - 21.7K bytes - Viewed (0) -
lib/fips140/v1.0.0.zip
(R16, R17) LDP 1*16(b_ptr), (R19, R20) LDP 2*16(b_ptr), (R21, R22) CSEL EQ, R16, R4, R4 CSEL EQ, R17, R5, R5 CSEL EQ, R19, R6, R6 CSEL EQ, R20, R7, R7 CSEL EQ, R21, R8, R8 CSEL EQ, R22, R9, R9 STP (R4, R5), 0*16(res_ptr) STP (R6, R7), 1*16(res_ptr) STP (R8, R9), 2*16(res_ptr) LDP 3*16(a_ptr), (R4, R5) LDP 4*16(a_ptr), (R6, R7) LDP 5*16(a_ptr), (R8, R9) LDP 3*16(b_ptr), (R16, R17) LDP 4*16(b_ptr), (R19, R20) LDP 5*16(b_ptr), (R21, R22) CSEL EQ, R16, R4, R4 CSEL EQ, R17, R5, R5 CSEL EQ, R19, R6, R6...
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jan 29 15:10:35 UTC 2025 - 635K bytes - Viewed (0)