=> (EXTRWconst [32-c] x2 x)
(XORshiftLL <t> [c] (UBFX [bfc] x) x2) && c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)
	=> (EXTRWconst [32-c] x2 x)

// Rewrite special pairs of shifts to AND.
// On ARM64 the bitmask can fit into an instruction.
(SRLconst [c] (SLLconst [c] x)) && 0 < c && c < 64 => (ANDconst [1<<uint(64-c)-1] x) // mask out high bits

eric fang <******@****.***> 1701834073 +0000

		{Name: "sha3", Feature: &ARM64.HasSHA3},
		{Name: "sha512", Feature: &ARM64.HasSHA512},
		{Name: "sm3", Feature: &ARM64.HasSM3},
		{Name: "sm4", Feature: &ARM64.HasSM4},
		{Name: "sve", Feature: &ARM64.HasSVE},
		{Name: "sve2", Feature: &ARM64.HasSVE2},
		{Name: "crc32", Feature: &ARM64.HasCRC32},
		{Name: "atomics", Feature: &ARM64.HasATOMICS},
		{Name: "asimdhp", Feature: &ARM64.HasASIMDHP},
		{Name: "cpuid", Feature: &ARM64.HasCPUID},

	{"android", "386"},
	{"android", "amd64"},
	{"android", "arm"},
	{"android", "arm64"},
	{"darwin", "amd64"},
	{"darwin", "arm64"},
	{"dragonfly", "amd64"},
	{"freebsd", "386"},
	{"freebsd", "amd64"},
	{"freebsd", "arm"},
	{"freebsd", "arm64"},
	{"freebsd", "riscv64"},
	{"illumos", "amd64"},
	{"ios", "amd64"},
	{"ios", "arm64"},
	{"js", "wasm"},
	{"linux", "386"},
	{"linux", "amd64"},
	{"linux", "arm"},

		case "linux/386", "linux/amd64", "linux/arm", "linux/arm64", "linux/loong64", "linux/ppc64le", "linux/riscv64", "linux/s390x",
			"android/amd64", "android/arm", "android/arm64", "android/386",
			"freebsd/amd64",
			"darwin/amd64", "darwin/arm64",
			"ios/amd64", "ios/arm64",
			"aix/ppc64",
			"openbsd/arm64",
			"windows/386", "windows/amd64", "windows/arm", "windows/arm64":
			return true
		}
		return false

	old_goarch := GOARCH
	old_goarm64 := GOARM64

	GOARCH = "arm64"

	os.Setenv("GOARM64", "v9.5")
	GOARM64 = goarm64()
	tags := gogoarchTags()
	want := []string{"arm64.v9.0", "arm64.v9.1", "arm64.v9.2", "arm64.v9.3", "arm64.v9.4", "arm64.v9.5",
		"arm64.v8.0", "arm64.v8.1", "arm64.v8.2", "arm64.v8.3", "arm64.v8.4", "arm64.v8.5", "arm64.v8.6", "arm64.v8.7", "arm64.v8.8", "arm64.v8.9"}
	if len(tags) != len(want) {

	}
	// arm64:`CMN`,-`CMP`
	if b+c != 0 {
		c5 = 1
	}
	// arm64:`CMN`,-`CMP`
	if a == -c {
		c6 = 1
	}
	// arm64:`CMN`,-`CMP`
	if b != -d {
		c7 = 1
	}
	// arm64:`CMN`,-`CMP`
	if a*b+c == 0 {
		c8 = 1
	}
	// arm64:`CMN`,-`CMP`
	if a*c+b != 0 {
		c9 = 1
	}
	// arm64:`CMP`,-`CMN`
	if b*c-a == 0 {
		c10 = 1
	}
	// arm64:`CMP`,-`CMN`
	if a*d-b != 0 {
		c11 = 1

	} else {
		x0 = b + 1
	}
	// arm64:"CSINC\tMI", -"CSEL"
	r0 = x0

	if s <= t {
		x1 = a
	} else {
		x1 = ^b
	}
	// arm64:"CSINV\tLS", -"CSEL"
	r1 = x1

	if s > t {
		x2 = a
	} else {
		x2 = -b
	}
	// arm64:"CSNEG\tMI", -"CSEL"
	r2 = x2

	if s >= t {
		x3 = -1
	} else {
		x3 = 0
	}
	// arm64:"CSETM\tLS", -"CSEL"
	r3 = x3

	if s == t {

func RotateLeft16(n uint16, s int) uint16 {
	// amd64:"ROLW" 386:"ROLW"
	// arm64:"RORW",-"CSEL"
	return bits.RotateLeft16(n, s)
}

func RotateLeft8(n uint8, s int) uint8 {
	// amd64:"ROLB" 386:"ROLB"
	// arm64:"LSL","LSR",-"CSEL"
	return bits.RotateLeft8(n, s)
}

func RotateLeftVariable(n uint, m int) uint {
	// amd64:"ROLQ"
	// arm64:"ROR"
	// ppc64x:"ROTL"
	// s390x:"RLLG"
	// wasm:"I64Rotl"

type Counter struct {
	count int32
}

func (c *Counter) Increment() {
	// Check that ARm64 v8.0 has both atomic instruction (LDADDALW) and a dynamic check
	// (for arm64HasATOMICS), while ARM64 v8.1 has only atomic and no dynamic check.
	// arm64/v8.0:"LDADDALW"
	// arm64/v8.1:"LDADDALW"
	// arm64/v8.0:".*arm64HasATOMICS"
	// arm64/v8.1:-".*arm64HasATOMICS"
	atomic.AddInt32(&c.count, 1)