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Results 1 - 3 of 3 for ALEAL (0.04 sec)
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src/cmd/internal/obj/x86/obj6.go
var lea, mov obj.As var reg int16 if ctxt.Arch.Family == sys.AMD64 { lea = ALEAQ mov = AMOVQ reg = REG_R15 } else { lea = ALEAL mov = AMOVL reg = REG_CX if p.As == ALEAL && p.To.Reg != p.From.Reg && p.To.Reg != p.From.Index { // Special case: clobber the destination register with // the PC so we don't have to clobber CX.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Sep 08 18:36:45 UTC 2023 - 40.9K bytes - Viewed (0) -
src/cmd/internal/obj/x86/asm6.go
{ALARL, yml_rl, Pm, opBytes{0x02}}, {ALARQ, yml_rl, Pw, opBytes{0x0f, 0x02}}, {ALARW, yml_rl, Pq, opBytes{0x02}}, {ALDDQU, ylddqu, Pf2, opBytes{0xf0}}, {ALDMXCSR, ysvrs_mo, Pm, opBytes{0xae, 02, 0xae, 02}}, {ALEAL, ym_rl, Px, opBytes{0x8d}}, {ALEAQ, ym_rl, Pw, opBytes{0x8d}}, {ALEAVEL, ynone, P32, opBytes{0xc9}}, {ALEAVEQ, ynone, Py, opBytes{0xc9}}, {ALEAVEW, ynone, Pe, opBytes{0xc9}}, {ALEAW, ym_rl, Pe, opBytes{0x8d}},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 146.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
}, }, { name: "LEAL", auxType: auxSymOff, argLen: 1, rematerializeable: true, symEffect: SymAddr, asm: x86.ALEAL, reg: regInfo{ inputs: []inputInfo{ {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB }, outputs: []outputInfo{
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)