- Sort Score
- Result 10 results
- Languages All
Results 1 - 6 of 6 for R0 (0.03 sec)
-
src/cmd/asm/internal/asm/testdata/armerror.s
MOVB F0, R0 // ERROR "illegal combination" MOVH F0, R0 // ERROR "illegal combination" MOVB R0, F0 // ERROR "illegal combination" MOVH R0, F0 // ERROR "illegal combination" MOVB R0>>0(R1), R2 // ERROR "bad shift" MOVB R0->0(R1), R2 // ERROR "bad shift" MOVB R0@>0(R1), R2 // ERROR "bad shift" MOVBS R0>>0(R1), R2 // ERROR "bad shift"
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Wed Oct 23 15:18:14 UTC 2024 - 14.5K bytes - Viewed (0) -
android/guava-tests/test/com/google/common/util/concurrent/RateLimiterTest.java
limiter.acquire(); // #7 } assertEvents( "R0.00, R1.38, R1.13, R0.88, R0.63, R0.50, R0.50, R0.50", // #1 "U0.50", // #2 "U4.00", // #3 "R0.00, R1.38, R1.13, R0.88, R0.63, R0.50, R0.50, R0.50", // #4 "U0.50", // #5 "U2.00", // #6 "R0.00, R0.50, R0.50, R0.50, R0.50, R0.50, R0.50, R0.50"); // #7 } public void testWarmUpWithColdFactor() {
Registered: Fri Nov 01 12:43:10 UTC 2024 - Last Modified: Mon Oct 21 14:28:19 UTC 2024 - 21.8K bytes - Viewed (0) -
guava-tests/test/com/google/common/util/concurrent/RateLimiterTest.java
limiter.acquire(); // #7 } assertEvents( "R0.00, R1.38, R1.13, R0.88, R0.63, R0.50, R0.50, R0.50", // #1 "U0.50", // #2 "U4.00", // #3 "R0.00, R1.38, R1.13, R0.88, R0.63, R0.50, R0.50, R0.50", // #4 "U0.50", // #5 "U2.00", // #6 "R0.00, R0.50, R0.50, R0.50, R0.50, R0.50, R0.50, R0.50"); // #7 } public void testWarmUpWithColdFactor() {
Registered: Fri Nov 01 12:43:10 UTC 2024 - Last Modified: Mon Oct 21 14:28:19 UTC 2024 - 21.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
CMP R3, R0 // 7c230000 CMP R3, R0, CR1 // CMP R3,CR1,R0 // 7ca30000 CMPU R3, R4 // 7c232040 CMPU R3, R0 // 7c230040 CMPU R3, R0, CR2 // CMPU R3,CR2,R0 // 7d230040 CMPW R3, R4 // 7c032000 CMPW R3, R0 // 7c030000 CMPW R3, R0, CR3 // CMPW R3,CR3,R0 // 7d830000
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Oct 29 13:14:38 UTC 2024 - 51K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/loong64enc1.s
ROTRV $4, R4 // 84104d00 SYSCALL // 00002b00 BEQ R4, R5, 1(PC) // 85040058 BEQ R4, 1(PC) // 80040040 BEQ R4, R0, 1(PC) // 80040040 BEQ R0, R4, 1(PC) // 80040040 BNE R4, R5, 1(PC) // 8504005c BNE R4, 1(PC) // 80040044 BNE R4, R0, 1(PC) // 80040044 BNE R0, R4, 1(PC) // 80040044 BLTU R4, 1(PC) // 80040068 MOVF y+8(FP), F4 // 6440002b MOVD y+8(FP), F4 // 6440802b
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Sat Nov 02 01:36:19 UTC 2024 - 11.6K bytes - Viewed (0) -
src/cmd/asm/internal/asm/asm.go
p.toPatch = append(p.toPatch, Patch{targetAddr, target.Sym.Name}) } else { p.branch(targetAddr, targetProg) } case target.Type == obj.TYPE_MEM && target.Name == obj.NAME_NONE: // JMP 4(R0) *targetAddr = *target // On the ppc64, 9a encodes BR (CTR) as BR CTR. We do the same. if p.arch.Family == sys.PPC64 && target.Offset == 0 { targetAddr.Type = obj.TYPE_REG }
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Mon Oct 21 14:11:44 UTC 2024 - 25.5K bytes - Viewed (0)