KMA	R2, R6, R4              // b9296024
	KMCTR   R2, R6, R4              // b92d6024

	// vector add and sub instructions
	VAB	V3, V4, V4              // e743400000f3
	VAH	V3, V4, V4              // e743400010f3
	VAF	V3, V4, V4              // e743400020f3
	VAG	V3, V4, V4              // e743400030f3
	VAQ	V3, V4, V4              // e743400040f3
	VAB	V1, V2                  // e721200000f3
	VAH	V1, V2                  // e721200010f3

	VADDUHM V1, V2, V3              // 10611040
	VADDUWM V1, V2, V3              // 10611080
	VADDUDM V1, V2, V3              // 106110c0
	VADDUQM V1, V2, V3              // 10611100
	VADDCUQ V1, V2, V3              // 10611140
	VADDCUW V1, V2, V3              // 10611180
	VADDUBS V1, V2, V3              // 10611200
	VADDUHS V1, V2, V3              // 10611240
	VADDUWS V1, V2, V3              // 10611280

	VUMAX	V3.B8, V2.B8, V1.B8             // 4164232e
	VUMAX	V3.B16, V2.B16, V1.B16          // 4164236e
	VUMAX	V3.H4, V2.H4, V1.H4             // 4164632e
	VUMAX	V3.H8, V2.H8, V1.H8             // 4164636e
	VUMAX	V3.S2, V2.S2, V1.S2             // 4164a32e
	VUMAX	V3.S4, V2.S4, V1.S4             // 4164a36e
	VUMIN	V3.B8, V2.B8, V1.B8             // 416c232e
	VUMIN	V3.B16, V2.B16, V1.B16          // 416c236e

	{"VS57", "VS57"},
	{"VS58", "VS58"},
	{"VS59", "VS59"},
	{"VS60", "VS60"},
	{"VS61", "VS61"},
	{"VS62", "VS62"},
	{"VS63", "VS63"},
	{"V0", "V0"},
	{"V1", "V1"},
	{"V2", "V2"},
	{"V3", "V3"},
	{"V4", "V4"},
	{"V5", "V5"},
	{"V6", "V6"},
	{"V7", "V7"},
	{"V8", "V8"},
	{"V9", "V9"},
	{"V10", "V10"},
	{"V11", "V11"},
	{"V12", "V12"},
	{"V13", "V13"},
	{"V14", "V14"},

	//TODO VFMAXNM V3.D2, V12.D2, V27.D2       // 9bc5634e
	FMAXNMS F11, F24, F12                      // 0c6b2b1e
	FMAXNMD F20, F6, F16                       // d068741e
	//TODO VFMAXNMP V3.S2, F2                  // 62c8307e
	//TODO VFMAXNMP V25.S2, V4.S2, V2.S2       // 82c4392e
	//TODO VFMAXNMV V14.S4, F15                // cfc9306e
	//TODO VFMAXP V3.S2, F27                   // 7bf8307e

constant. It can do this by reading object files. If cgo has decided
that t1 is a type, v2 and v3 are variables or functions, and i4, i5
are integer constants, u6 is an unsigned integer constant, and f7 and f8
are float constants, and s9 and s10 are string constants, it generates:

	<preamble>
	__typeof__(t1) *__cgo__1;
	__typeof__(v2) *__cgo__2;
	__typeof__(v3) *__cgo__3;
	__typeof__(i4) *__cgo__4;
	enum { __cgo_enum__4 = i4 };

	VDIVESD V1, V2, V3                      // 106113cb
	VDIVESQ V1, V2, V3                      // 1061130b
	VDIVESW V1, V2, V3                      // 1061138b
	VDIVEUD V1, V2, V3                      // 106112cb
	VDIVEUQ V1, V2, V3                      // 1061120b
	VDIVEUW V1, V2, V3                      // 1061128b
	VDIVSD V1, V2, V3                       // 106111cb

			Typeflag: '0',
			Uname:    "rawr",
			Gname:    "dsnet",
			Format:   FormatGNU,
		}},
	}, {
		// BSD tar v3.1.2 and GNU tar v1.27.1 both rejects PAX records
		// with NULs in the key.
		file: "testdata/pax-nul-xattrs.tar",
		err:  ErrHeader,
	}, {
		// BSD tar v3.1.2 rejects a PAX path with NUL in the value, while
		// GNU tar v1.27.1 simply truncates at first NUL.

	VFMLA	V1.B16, V12.B16, V3.B16                          // ERROR "invalid arrangement"
	VFMLA	V1.H4, V12.H4, V3.H4                             // ERROR "invalid arrangement"
	VFMLA	V1.H8, V12.H8, V3.H8                             // ERROR "invalid arrangement"
	VFMLA	V1.H4, V12.H4, V3.H4                             // ERROR "invalid arrangement"

	}
}

// registerList parses an ARM or ARM64 register list expression, a list of
// registers in []. There may be comma-separated ranges or individual
// registers, as in [R1,R3-R5] or [V1.S4, V2.S4, V3.S4, V4.S4].
// For ARM, only R0 through R15 may appear.
// For ARM64, V0 through V31 with arrangement may appear.
//
// For 386/AMD64 register list specifies 4VNNIW-style multi-source operand.