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Results 1 - 9 of 9 for TODO (4.45 sec)

  1. src/cmd/asm/internal/asm/testdata/amd64enc.s

    	//TODO: BNDCU (BX), BND2                // f20f1a13
    	//TODO: BNDCU (R11), BND2               // f2410f1a13
    	//TODO: BNDCU DX, BND2                  // f20f1ad2
    	//TODO: BNDCU R11, BND2                 // f2410f1ad3
    	//TODO: BNDCU (BX), BND3                // f20f1a1b
    	//TODO: BNDCU (R11), BND3               // f2410f1a1b
    	//TODO: BNDCU DX, BND3                  // f20f1ada
    	//TODO: BNDCU R11, BND3                 // f2410f1adb
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Oct 08 21:38:44 GMT 2021
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  2. src/cmd/asm/internal/asm/testdata/arm64enc.s

    	//TODO LDTRSW 0x1e(LR), R5                 // c5eb81b8
    	//TODO LDUR 0xbf(R13), R1                  // a1f14bb8
    	//TODO LDUR -0x3c(R22), R3                 // c3425cf8
    	//TODO LDURB -0xff(R17), R14               // 2e125038
    	//TODO LDURH 0x80(R1), R6                  // 26004878
    	//TODO LDURSB 0xde(LR), R3                 // c3e3cd38
    	//TODO LDURSB 0x96(R9), R7                 // 27618938
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Mon Jul 24 01:11:41 GMT 2023
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  3. src/cmd/asm/internal/asm/testdata/ppc64.s

    	MOVWZ $-2147483648, R5          // 3ca08000
    
    	// TODO: These are preprocessed by the assembler into MOVD $const>>shift, R5; SLD $shift, R5.
    	//       This only captures the MOVD. Should the SLD be appended to the encoding by the test?
    	// Hex constant 0x20004000000
    	MOVD $2199090364416, R5         // 60058001
    	// Hex constant 0xFFFFFE0004000000
    	MOVD $-2198956146688, R5        // 38a08001
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Apr 24 15:53:25 GMT 2024
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  4. src/cmd/asm/internal/asm/testdata/386.s

    	JMP	label // JMP 16
    	CALL	foo(SB)
    //	CALL	(AX*4) // TODO: This line is silently dropped on the floor!
    	CALL	foo+4(SB)(AX*4)
    	CALL	*4(SP) // CALL 4(SP)
    	CALL	*(AX) // CALL (AX)
    	CALL	*(SP) // CALL (SP)
    //	CALL	*(AX*4) // TODO: This line is silently dropped on the floor!
    	CALL	*(AX)(AX*4) // CALL (AX)(AX*4)
    	CALL	4(SP)
    	CALL	(AX)
    	CALL	(SP)
    //	CALL	(AX*4) // TODO: This line is silently dropped on the floor!
    	JCS	2(PC)
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Apr 09 18:57:21 GMT 2019
    - 2K bytes
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  5. src/cmd/asm/internal/asm/testdata/arm.s

    //	{
    //		outcode($1, Always, &nullgen, 0, &$3);
    //	}
    	BEQ	1(PC)
    
    //
    // SWI
    //
    //	LTYPE6 cond comma gen
    //	{
    //		outcode($1, $2, &nullgen, 0, &$4);
    //	}
    	SWI	$2
    	SWI	$3
    //	SWI	foo(SB) - TODO: classifying foo(SB) as C_TLS_LE
    
    //
    // CMP
    //
    //	LTYPE7 cond imsr ',' spreg
    //	{
    //		outcode($1, $2, &$3, $5, &nullgen);
    //	}
    	CMP	$1, R2
    	CMP	R1<<R2, R3
    	CMP	R1, R2
    
    //
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    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 15 20:51:01 GMT 2023
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  6. src/cmd/asm/internal/asm/testdata/arm64.s

    	AND	$1, ZR                              // fb0340b2ff031b8a
    	ANDW	$1, ZR                              // fb030032ff031b0a
    	// TODO: this could have better encoding
    	ANDW	$-1, R10                            // 1b0080124a011b0a
    	AND	$8, R0, RSP                         // 1f007d92
    	ORR	$8, R0, RSP                         // 1f007db2
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 08 03:28:17 GMT 2023
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  7. src/cmd/asm/internal/asm/testdata/amd64.s

    	JCS	2(PC)
    	JMP	*4(SP) // JMP 4(SP)
    	JCS	2(PC)
    	JMP	*(R12) // JMP (R12)
    	JCS	2(PC)
    //	JMP	*(R12*4) // TODO: This line is silently dropped on the floor!
    	JCS	2(PC)
    	JMP	*(R12)(R13*4) // JMP (R12)(R13*4)
    	JCS	2(PC)
    	JMP	*(AX) // JMP (AX)
    	JCS	2(PC)
    	JMP	*(SP) // JMP (SP)
    	JCS	2(PC)
    //	JMP	*(AX*4) // TODO: This line is silently dropped on the floor!
    	JCS	2(PC)
    	JMP	*(AX)(AX*4) // JMP (AX)(AX*4)
    	JCS	2(PC)
    	JMP	4(SP)
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Apr 09 18:57:21 GMT 2019
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  8. src/cmd/asm/internal/asm/testdata/amd64error.s

    	// VEX-encoded VSIB can't use High-16 registers as index (unlike EVEX).
    	// TODO(quasilyte): improve error message (#21860).
    	VPGATHERQQ X2, (BP)(X20*2), X3  // ERROR "invalid instruction"
    	VPGATHERQQ Y2, (BP)(Y20*2), Y3  // ERROR "invalid instruction"
    	// YzrMulti4 expects exactly 4 registers referenced by REG_LIST.
    	// TODO(quasilyte): improve error message (#21860).
    	V4FMADDPS (AX), [Z0-Z4], K1, Z7  // ERROR "invalid instruction"
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    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Jun 14 00:03:57 GMT 2023
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  9. src/cmd/asm/internal/asm/testdata/loong64.s

    // Copyright 2022 The Go Authors. All rights reserved.
    // Use of this source code is governed by a BSD-style
    // license that can be found in the LICENSE file.
    
    #include "../../../../../runtime/textflag.h"
    // TODO: cover more instruction
    
    TEXT foo(SB),DUPOK|NOSPLIT,$0
    	JAL	1(PC)	//CALL 1(PC)	//00040054
    	JAL	(R4)	//CALL (R4)	//8100004c
    	// relocation in play so the assembled offset should be 0
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    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Mar 22 18:50:59 GMT 2023
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