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src/cmd/asm/internal/asm/testdata/amd64enc.s
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Fri Oct 08 21:38:44 GMT 2021 - 581.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64enc.s
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src/cmd/asm/internal/asm/testdata/ppc64.s
MOVWZ $-2147483648, R5 // 3ca08000 // TODO: These are preprocessed by the assembler into MOVD $const>>shift, R5; SLD $shift, R5. // This only captures the MOVD. Should the SLD be appended to the encoding by the test? // Hex constant 0x20004000000 MOVD $2199090364416, R5 // 60058001 // Hex constant 0xFFFFFE0004000000 MOVD $-2198956146688, R5 // 38a08001
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src/cmd/asm/internal/asm/testdata/386.s
JMP label // JMP 16 CALL foo(SB) // CALL (AX*4) // TODO: This line is silently dropped on the floor! CALL foo+4(SB)(AX*4) CALL *4(SP) // CALL 4(SP) CALL *(AX) // CALL (AX) CALL *(SP) // CALL (SP) // CALL *(AX*4) // TODO: This line is silently dropped on the floor! CALL *(AX)(AX*4) // CALL (AX)(AX*4) CALL 4(SP) CALL (AX) CALL (SP) // CALL (AX*4) // TODO: This line is silently dropped on the floor! JCS 2(PC)
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src/cmd/asm/internal/asm/testdata/arm.s
// { // outcode($1, Always, &nullgen, 0, &$3); // } BEQ 1(PC) // // SWI // // LTYPE6 cond comma gen // { // outcode($1, $2, &nullgen, 0, &$4); // } SWI $2 SWI $3 // SWI foo(SB) - TODO: classifying foo(SB) as C_TLS_LE // // CMP // // LTYPE7 cond imsr ',' spreg // { // outcode($1, $2, &$3, $5, &nullgen); // } CMP $1, R2 CMP R1<<R2, R3 CMP R1, R2 //
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src/cmd/asm/internal/asm/testdata/arm64.s
AND $1, ZR // fb0340b2ff031b8a ANDW $1, ZR // fb030032ff031b0a // TODO: this could have better encoding ANDW $-1, R10 // 1b0080124a011b0a AND $8, R0, RSP // 1f007d92 ORR $8, R0, RSP // 1f007db2
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src/cmd/asm/internal/asm/testdata/amd64.s
JCS 2(PC) JMP *4(SP) // JMP 4(SP) JCS 2(PC) JMP *(R12) // JMP (R12) JCS 2(PC) // JMP *(R12*4) // TODO: This line is silently dropped on the floor! JCS 2(PC) JMP *(R12)(R13*4) // JMP (R12)(R13*4) JCS 2(PC) JMP *(AX) // JMP (AX) JCS 2(PC) JMP *(SP) // JMP (SP) JCS 2(PC) // JMP *(AX*4) // TODO: This line is silently dropped on the floor! JCS 2(PC) JMP *(AX)(AX*4) // JMP (AX)(AX*4) JCS 2(PC) JMP 4(SP)
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src/cmd/asm/internal/asm/testdata/amd64error.s
// VEX-encoded VSIB can't use High-16 registers as index (unlike EVEX). // TODO(quasilyte): improve error message (#21860). VPGATHERQQ X2, (BP)(X20*2), X3 // ERROR "invalid instruction" VPGATHERQQ Y2, (BP)(Y20*2), Y3 // ERROR "invalid instruction" // YzrMulti4 expects exactly 4 registers referenced by REG_LIST. // TODO(quasilyte): improve error message (#21860). V4FMADDPS (AX), [Z0-Z4], K1, Z7 // ERROR "invalid instruction"
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src/cmd/asm/internal/asm/testdata/loong64.s
// Copyright 2022 The Go Authors. All rights reserved. // Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. #include "../../../../../runtime/textflag.h" // TODO: cover more instruction TEXT foo(SB),DUPOK|NOSPLIT,$0 JAL 1(PC) //CALL 1(PC) //00040054 JAL (R4) //CALL (R4) //8100004c // relocation in play so the assembled offset should be 0
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