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  1. src/cmd/asm/internal/asm/testdata/ppc64.s

    #include "../../../../../runtime/textflag.h"
    
    // In case of index mode instructions, usage of
    // (Rx)(R0) is equivalent to (Rx+R0)
    // In case of base+displacement mode instructions if
    // the offset is 0, usage of (Rx) is equivalent to 0(Rx)
    TEXT asmtest(SB),DUPOK|NOSPLIT,$0
    	// move constants
    	MOVD $1, R3                     // 38600001
    	MOVD $-1, R4                    // 3880ffff
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Apr 24 15:53:25 GMT 2024
    - 49K bytes
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  2. src/cmd/asm/internal/asm/testdata/amd64enc_extra.s

    	// Test that VPERMPD that shares ytab list with VPERMQ continues to work too.
    	VPERMPD $-40, Y7, Y7 // c4e3fd01ffd8
    	VPERMPD $216, Y7, Y7 // c4e3fd01ffd8
    	// Check that LEAL is permitted to use overflowing offset.
    	LEAL 2400959708(BP)(R10*1), BP // 428dac15dcbc1b8f
    	LEAL 3395469782(AX)(R10*1), AX // 428d8410d6c162ca
    	// Make sure MOV CR/DR continues to work after changing its movtabs.
    	MOVQ CR0, AX // 0f20c0
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Apr 11 18:32:50 GMT 2023
    - 57.6K bytes
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  3. src/cmd/asm/internal/asm/testdata/arm64.s

    	MOVW	$0, (R1)  // 3f0000b9
    	MOVWU	$0, (R1)  // 3f0000b9
    	MOVH	$0, (R1)  // 3f000079
    	MOVHU	$0, (R1)  // 3f000079
    	MOVB	$0, (R1)  // 3f000039
    	MOVBU	$0, (R1)  // 3f000039
    
    // small offset fits into instructions
    	MOVB	R1, 1(R2) // 41040039
    	MOVH	R1, 1(R2) // 41100078
    	MOVH	R1, 2(R2) // 41040079
    	MOVW	R1, 1(R2) // 411000b8
    	MOVW	R1, 4(R2) // 410400b9
    	MOVD	R1, 1(R2) // 411000f8
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 08 03:28:17 GMT 2023
    - 94.9K bytes
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  4. src/cmd/asm/internal/asm/testdata/arm.s

    //		g = nullgen;
    //		g.Type = obj.TYPE_CONST;
    //		g.Offset = int64($6);
    //		outcode($1, $2, &$3, 0, &g);
    //	}
    	MOVM	0(R1), [R2,R5,R8,g] // MOVM	(R1), [R2,R5,R8,g]
    	MOVM	(R1), [R2-R5] // MOVM (R1), [R2,R3,R4,R5]
    	MOVM	(R1), [R2]
    
    //	LTYPE8 cond '[' reglist ']' ',' ioreg
    //	{
    //		var g obj.Addr
    //
    //		g = nullgen;
    //		g.Type = obj.TYPE_CONST;
    //		g.Offset = int64($4);
    //		outcode($1, $2, &g, 0, &$7);
    //	}
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 15 20:51:01 GMT 2023
    - 69K bytes
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  5. src/cmd/asm/internal/asm/testdata/armerror.s

    	MOVM.IA	4(R1), [R0-R4]     // ERROR "offset must be zero"
    	MOVM.DA	4(R1), [R0-R4]     // ERROR "offset must be zero"
    	MOVM.IB	4(R1), [R0-R4]     // ERROR "offset must be zero"
    	MOVM.DB	4(R1), [R0-R4]     // ERROR "offset must be zero"
    	MOVM.IA	[R0-R4], 4(R1)     // ERROR "offset must be zero"
    	MOVM.DA	[R0-R4], 4(R1)     // ERROR "offset must be zero"
    	MOVM.IB	[R0-R4], 4(R1)     // ERROR "offset must be zero"
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Nov 03 14:06:21 GMT 2017
    - 14.4K bytes
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  6. src/cmd/asm/internal/asm/testdata/arm64error.s

    	VST1.P	[V4.S4,V5.S4], 48(R1)                            // ERROR "invalid post-increment offset"
    	VST1.P	[V4.S4], 8(R1)                                   // ERROR "invalid post-increment offset"
    	VLD1.P	32(R1), [V8.S4, V9.S4, V10.S4]                   // ERROR "invalid post-increment offset"
    	VLD1.P	48(R1), [V7.S4, V8.S4, V9.S4, V10.S4]            // ERROR "invalid post-increment offset"
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 08 03:28:17 GMT 2023
    - 37.8K bytes
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  7. src/cmd/asm/internal/asm/testdata/386enc.s

    	MOVQ (AX), M0  // 0f6f00
    	MOVQ M0, 8(SP) // 0f7f442408
    	MOVQ 8(SP), M0 // 0f6f442408
    	MOVQ M0, (AX)  // 0f7f00
    	MOVQ M0, (BX)  // 0f7f03
    	// On non-64bit arch, Go asm allowed uint32 offsets instead of int32.
    	// These tests check that property for backwards-compatibility.
    	MOVL 2147483648(AX), AX  // 8b8000000080
    	MOVL -2147483648(AX), AX // 8b8000000080
    	ADDL 2147483648(AX), AX  // 038000000080
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Apr 11 18:32:50 GMT 2023
    - 1.2K bytes
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  8. src/cmd/asm/internal/asm/testdata/loong64enc1.s

    TEXT asmtest(SB),DUPOK|NOSPLIT,$0
    lable1:
    	BFPT	1(PC)			// 00050048
    	BFPT	lable1	// BFPT 2	//1ffdff4b
    
    lable2:
    	BFPF	1(PC)			// 00040048
    	BFPF	lable2	// BFPF 4 	// 1ffcff4b
    
    	// relocation in play so the assembled offset should be 0
    	JMP	foo(SB)			// 00000050
    
    	JMP	(R4)			// 8000004c
    	JMP	1(PC)			// 00040050
    	MOVW	$65536, R4		// 04020014
    	MOVW	$4096, R4		// 24000014
    	MOVV	$65536, R4		// 04020014
    	MOVV	$4096, R4		// 24000014
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Mar 31 02:56:19 GMT 2023
    - 6.4K bytes
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  9. src/cmd/asm/internal/asm/testdata/amd64error.s

    	// Check offset overflow. Must fit in int32.
    	MOVQ 2147483647+1(AX), AX       // ERROR "offset too large"
    	MOVQ 3395469782(R10), R8        // ERROR "offset too large"
    	LEAQ 3395469782(AX), AX         // ERROR "offset too large"
    	ADDQ 3395469782(AX), AX         // ERROR "offset too large"
    	ADDL 3395469782(AX), AX         // ERROR "offset too large"
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Jun 14 00:03:57 GMT 2023
    - 8.9K bytes
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  10. src/cmd/asm/internal/asm/testdata/loong64.s

    #include "../../../../../runtime/textflag.h"
    // TODO: cover more instruction
    
    TEXT foo(SB),DUPOK|NOSPLIT,$0
    	JAL	1(PC)	//CALL 1(PC)	//00040054
    	JAL	(R4)	//CALL (R4)	//8100004c
    	// relocation in play so the assembled offset should be 0
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Mar 22 18:50:59 GMT 2023
    - 434 bytes
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