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  1. src/cmd/asm/internal/asm/testdata/ppc64.s

    	// and accept the same constants.
    	MOVW $2147483648, R5            // 64058000
    	MOVWZ $-2147483648, R5          // 3ca08000
    
    	// TODO: These are preprocessed by the assembler into MOVD $const>>shift, R5; SLD $shift, R5.
    	//       This only captures the MOVD. Should the SLD be appended to the encoding by the test?
    	// Hex constant 0x20004000000
    	MOVD $2199090364416, R5         // 60058001
    	// Hex constant 0xFFFFFE0004000000
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Apr 24 15:53:25 GMT 2024
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  2. src/cmd/asm/internal/asm/testdata/riscv64error.s

    // Copyright 2021 The Go Authors. All rights reserved.
    // Use of this source code is governed by a BSD-style
    // license that can be found in the LICENSE file.
    
    TEXT errors(SB),$0
    	MOV	$errors(SB), (X5)		// ERROR "address load must target register"
    	MOV	$8(SP), (X5)			// ERROR "address load must target register"
    	MOVB	$8(SP), X5			// ERROR "unsupported address load"
    	MOVH	$8(SP), X5			// ERROR "unsupported address load"
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Sun Apr 07 03:32:27 GMT 2024
    - 2.8K bytes
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  3. src/cmd/asm/internal/asm/testdata/riscv64.s

    // Copyright 2019 The Go Authors. All rights reserved.
    // Use of this source code is governed by a BSD-style
    // license that can be found in the LICENSE file.
    
    #include "../../../../../runtime/textflag.h"
    
    TEXT asmtest(SB),DUPOK|NOSPLIT,$0
    start:
    	// Unprivileged ISA
    
    	// 2.4: Integer Computational Instructions
    
    	ADDI	$2047, X5				// 9382f27f
    	ADDI	$-2048, X5				// 93820280
    	ADDI	$2048, X5				// 9382024093820240
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Mar 22 04:42:21 GMT 2024
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