$8, XL, XL, T1 // 2nd reduction phase VPMSUMD XL, XC2, XL VXOR T1, XH, T1 even: VXOR XL, T1, XL #ifdef GOARCH_ppc64le VPERM XL, XL, LEMASK, XL #endif STXVD2X VXL, (XIP+R0) OR R12, R12, R12 // write out Xi RET gcm_ghash_p8_4x: LVSL (R8)(R0), T0 // 0x0001..0e0f MOVD $0x70, R8 LXVD2X (HTBL)(R9), VH2 MOVD $0x80, R9 VSPLTISB $8, T1 // 0x0808..0808 MOVD $0x90, R10 LXVD2X (HTBL)(R8), VH3L // load H^3 MOVD $0xa0, R8 LXVD2X (HTBL)(R9), VH3 MOVD $0xb0, R9 LXVD2X (HTBL)(R10), VH3H MOVD $0xc0, R10 LXVD2X (HTBL)(R8),...