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Results 1 - 5 of 5 for Cint (0.2 sec)

  1. tensorflow/compiler/mlir/tensorflow/ir/tf_generated_ops.td

    }
    
    def TF_RintOp : TF_Op<"Rint", [Pure, TF_Idempotent, TF_SameOperandsAndResultTypeResolveRef]> {
      let summary = "Returns element-wise integer closest to x.";
    
      let description = [{
    If the result is midway between two representable values,
    the even representable is chosen.
    For example:
    
    ```
    rint(-1.5) ==> -2.0
    rint(0.5000001) ==> 1.0
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jun 11 23:24:08 UTC 2024
    - 793K bytes
    - Viewed (0)
  2. CHANGELOG/CHANGELOG-1.19.md

    - github.com/golangci/golangci-lint: [v1.18.0](https://github.com/golangci/golangci-lint/tree/v1.18.0)
    - github.com/golangci/gosec: [66fb7fc](https://github.com/golangci/gosec/tree/66fb7fc)
    - github.com/golangci/ineffassign: [42439a7](https://github.com/golangci/ineffassign/tree/42439a7)
    - github.com/golangci/lint-1: [ee948d0](https://github.com/golangci/lint-1/tree/ee948d0)
    Registered: Sat Jun 15 01:39:40 UTC 2024
    - Last Modified: Wed Jan 05 05:42:32 UTC 2022
    - 489.7K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/rewritegeneric.go

    	// result: (AddPtr ptr (Mul32 <typ.Int> idx (Const32 <typ.Int> [int32(t.Elem().Size())])))
    	for {
    		t := v.Type
    		ptr := v_0
    		idx := v_1
    		if !(config.PtrSize == 4 && is32Bit(t.Elem().Size())) {
    			break
    		}
    		v.reset(OpAddPtr)
    		v0 := b.NewValue0(v.Pos, OpMul32, typ.Int)
    		v1 := b.NewValue0(v.Pos, OpConst32, typ.Int)
    		v1.AuxInt = int32ToAuxInt(int32(t.Elem().Size()))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 22 18:24:47 UTC 2024
    - 812.2K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/rewriteARM64.go

    			y := v_1.Args[0]
    			if !(ac == ^((1<<uint(bfc.getARM64BFwidth()) - 1) << uint(bfc.getARM64BFlsb()))) {
    				continue
    			}
    			v.reset(OpARM64BFI)
    			v.AuxInt = arm64BitFieldToAuxInt(bfc)
    			v.AddArg2(y, x)
    			return true
    		}
    		break
    	}
    	// match: (OR (UBFX [bfc] x) (ANDconst [ac] y))
    	// cond: ac == ^(1<<uint(bfc.getARM64BFwidth())-1)
    	// result: (BFXIL [bfc] y x)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 608.6K bytes
    - Viewed (0)
  5. RELEASE.md

        *   Added 8-bit/16-bit/32-bit int/uint support for the built-in op `right_shift`
        *   Added reference implementation for 16-bit int unquantized `add`.
        *   Added reference implementation for 16-bit int and 32-bit unsigned int unquantized `mul`.
        *   `add_op` supports broadcasting up to 6 dimensions.
        *   Added 16-bit support for `top_k`.
    
    *   `tf.function`
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jun 11 23:24:08 UTC 2024
    - 730.3K bytes
    - Viewed (0)
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