RORB $1, (BX)                           // d00b
	RORB $1, (R11)                          // 41d00b
	RORB $1, DL                             // d0ca
	RORB $1, R11                            // 41d0cb
	RORB CL, (BX)                           // d20b
	RORB CL, (R11)                          // 41d20b
	RORB CL, DL                             // d2ca
	RORB CL, R11                            // 41d2cb

	v_1 := v.Args[1]
	v_0 := v.Args[0]
	// match: (ROLB x (NEGQ y))
	// result: (RORB x y)
	for {
		x := v_0
		if v_1.Op != OpAMD64NEGQ {
			break
		}
		y := v_1.Args[0]
		v.reset(OpAMD64RORB)
		v.AddArg2(x, y)
		return true
	}
	// match: (ROLB x (NEGL y))
	// result: (RORB x y)
	for {
		x := v_0
		if v_1.Op != OpAMD64NEGL {
			break
		}