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Results 1 - 5 of 5 for teq (0.02 sec)
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src/cmd/asm/internal/asm/testdata/arm.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 15 20:51:01 UTC 2023 - 69K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM.rules
(TST x (SRL y z)) => (TSTshiftRLreg x y z) (TST x (SRA y z)) => (TSTshiftRAreg x y z) (TEQ x (SLLconst [c] y)) => (TEQshiftLL x y [c]) (TEQ x (SRLconst [c] y)) => (TEQshiftRL x y [c]) (TEQ x (SRAconst [c] y)) => (TEQshiftRA x y [c]) (TEQ x (SLL y z)) => (TEQshiftLLreg x y z) (TEQ x (SRL y z)) => (TEQshiftRLreg x y z) (TEQ x (SRA y z)) => (TEQshiftRAreg x y z) (CMN x (SLLconst [c] y)) => (CMNshiftLL x y [c])
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 90.1K bytes - Viewed (0) -
src/cmd/internal/obj/mips/asm0.go
// remove the NOTUSETMP flag in optab. o1 = OP_SRR(c.opirr(-ASLLV), 0, p.From.Reg, p.To.Reg) o2 = OP_SRR(c.opirr(-ASRLV), 0, p.To.Reg, p.To.Reg) case 15: /* teq $c r,r */ r := p.Reg if r == obj.REG_NONE { r = REGZERO } v := c.regoff(&p.From) /* only use 10 bits of trap code */ o1 = OP_IRR(c.opirr(p.As), (uint32(v)&0x3FF)<<6, r, p.To.Reg)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 17:46:09 UTC 2024 - 53.6K bytes - Viewed (0) -
src/cmd/internal/obj/loong64/asm.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 61.8K bytes - Viewed (0) -
src/compress/flate/testdata/huffman-rand-max.in
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Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 11 17:40:52 UTC 2016 - 64K bytes - Viewed (0)