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Results 1 - 4 of 4 for phi2 (0.06 sec)
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src/cmd/compile/internal/ssa/regalloc.go
// // Phi values are special, as always. We define two kinds of phis, those // where the merge happens in a register (a "register" phi) and those where // the merge happens in a stack location (a "stack" phi). // // A register phi must have the phi and all of its inputs allocated to the // same register. Register phis are spilled similarly to regular ops. //
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 17:49:56 UTC 2023 - 87.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/prove.go
// That means this code: // // loop: // ind = (Phi (Const [x]) nxt), // if ind < end // then goto enter_loop // else goto exit_loop // // enter_loop: // do something without using ind nor nxt // nxt = inc + ind // goto loop // // exit_loop: // // is rewritten to: // // loop: // ind = (Phi end nxt) // if (Const [x]) < ind
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:30:21 UTC 2024 - 48.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewrite.go
// Since target and load are in the same block // we can stop searching when we leave the block. continue } if v.Op == OpPhi { // A Phi implies we have reached the top of the block. // The memory phi, if it exists, is always // the first logical store in the block. continue } if v.Type.IsTuple() && v.Type.FieldType(1).IsMemory() {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 64.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/debug.go
return !opcodeTable[v.Op].zeroWidth } else { return v.Op == OpInitMem } } // Examine the prolog portion of the block to process special // zero-width ops such as Arg, Phi, LoweredGetClosurePtr (etc) // whose lifetimes begin at the block starting point. In an // entry block, allow for the possibility that we may see Arg // ops that appear _after_ other non-zero-width operations.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jun 10 19:44:43 UTC 2024 - 58.4K bytes - Viewed (0)