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Results 1 - 4 of 4 for SRWconst (3.12 sec)

  1. src/cmd/compile/internal/ssa/_gen/PPC64.rules

    (ANDconst [c] (MOVWZreg x)) => (ANDconst [c&0xFFFFFFFF] x)
    
    // Eliminate unnecessary sign/zero extend following right shift
    (MOV(B|H|W)Zreg (SRWconst [c] (MOVBZreg x))) => (SRWconst [c] (MOVBZreg x))
    (MOV(H|W)Zreg (SRWconst [c] (MOVHZreg x))) => (SRWconst [c] (MOVHZreg x))
    (MOVWZreg (SRWconst [c] (MOVWZreg x))) => (SRWconst [c] (MOVWZreg x))
    (MOV(B|H|W)reg (SRAWconst [c] (MOVBreg x))) => (SRAWconst [c] (MOVBreg x))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 53.2K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/S390X.rules

    // other bytes might contain junk so a zero extension is required if
    // the desired output type is larger than 1 byte.
    (SumBytes2 x) => (ADDW (SRWconst <typ.UInt8> x [8]) x)
    (SumBytes4 x) => (SumBytes2 (ADDW <typ.UInt16> (SRWconst <typ.UInt16> x [16]) x))
    (SumBytes8 x) => (SumBytes4 (ADDW <typ.UInt32> (SRDconst <typ.UInt32> x [32]) x))
    
    (Bswap64 ...) => (MOVDBR ...)
    (Bswap32 ...) => (MOVWBR ...)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 12 18:09:26 UTC 2023
    - 74.3K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/rewrite.go

    // and return mask & m.
    func mergePPC64RShiftMask(m, s, nbits int64) int64 {
    	smask := uint64((1<<uint(nbits))-1) >> uint(s)
    	return m & int64(smask)
    }
    
    // Combine (ANDconst [m] (SRWconst [s])) into (RLWINM [y]) or return 0
    func mergePPC64AndSrwi(m, s int64) int64 {
    	mask := mergePPC64RShiftMask(m, s, 32)
    	if !isPPC64WordRotateMask(mask) {
    		return 0
    	}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 64.2K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/_gen/S390XOps.go

    		{name: "SRDconst", argLength: 1, reg: gp11, asm: "SRD", aux: "UInt8"}, // unsigned arg0 >> auxint, shift amount 0-63
    		{name: "SRWconst", argLength: 1, reg: gp11, asm: "SRW", aux: "UInt8"}, // unsigned uint32(arg0) >> auxint, shift amount 0-31
    
    		// Arithmetic shifts clobber flags.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 24 00:21:13 UTC 2023
    - 52.5K bytes
    - Viewed (0)
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