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Results 1 - 10 of 12 for Oops (0.06 sec)
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cmd/xl-storage-format-v2.go
Registered: Sun Nov 03 19:28:11 UTC 2024 - Last Modified: Tue Oct 22 15:30:50 UTC 2024 - 64K bytes - Viewed (0) -
tensorflow/BUILD
# A shared object which includes registration mechanisms for ops and # kernels. Does not include the implementations of any ops or kernels. Instead, # the library which loads libtensorflow_framework.so # (e.g. _pywrap_tensorflow_internal.so for Python, libtensorflow.so for the C # API) is responsible for registering ops with libtensorflow_framework.so. In # addition to this core set of ops, user libraries which are loaded (via
Registered: Tue Nov 05 12:39:12 UTC 2024 - Last Modified: Wed Oct 16 05:28:35 UTC 2024 - 53.5K bytes - Viewed (0) -
tensorflow/c/c_api_function_test.cc
ASSERT_EQ(expected[i], data[i]) << "Different data at index " << i; } } std::vector<TF_Output> ToOutput(const std::vector<TF_Operation*> ops) { std::vector<TF_Output> out; for (auto op : ops) { out.push_back({op, 0}); } return out; } void Define(int num_opers, const std::vector<TF_Operation*>& opers,
Registered: Tue Nov 05 12:39:12 UTC 2024 - Last Modified: Thu Jul 20 22:08:54 UTC 2023 - 63.6K bytes - Viewed (0) -
tensorflow/c/c_api.h
// -------------------------------------------------------------------------- // Load plugins containing custom ops and kernels // TF_Library holds information about dynamically loaded TensorFlow plugins. typedef struct TF_Library TF_Library; // Load the library specified by library_filename and register the ops and // kernels present in that library. //
Registered: Tue Nov 05 12:39:12 UTC 2024 - Last Modified: Thu Oct 26 21:08:15 UTC 2023 - 82.3K bytes - Viewed (0) -
tensorflow/c/c_api_test.cc
typedef tensorflow::protobuf::RepeatedPtrField<tensorflow::OpDef> OpDefs; const OpDefs& ops = op_list.op(); bool found = std::find_if(ops.begin(), ops.end(), [](const tensorflow::OpDef& op_def) { return op_def.name() == "TestCApi"; }) != ops.end(); EXPECT_TRUE(found); TF_DeleteBuffer(op_list_buffer); } }
Registered: Tue Nov 05 12:39:12 UTC 2024 - Last Modified: Sat Oct 12 16:27:48 UTC 2024 - 97K bytes - Viewed (0) -
android/guava/src/com/google/thirdparty/publicsuffix/PublicSuffixPatterns.java
dagod.citsalej,s&nd&ps,uolc,?ppatikria,?ysrab,??g!.&bew?gro?m&aug?oc??ofni?ten?ude?vog???h!.&0002?a&citore?idem?kitore??edszot?gro?ilus?letoh?m&alker?lif?t?urof??naltagni?o&c?ediv?fni?levynok?nisac??pohs?rarga?s&a&kal?zatu??emag?wen??t&lob?opsgolb,rops??virp?xe&s?zs??ytic?zsagoj??os?sut??l!.&etisbew321,topsgolb,??m!.&ca?gro?moc?oc?ro?ten?vog???n!.&duolcesirpretne,eni&esrem,m,?tenkcahs,?em!.&enilnoysrab,ysrab,???o&ggnaw?y!c???r!.&3kl,a&i&kymlak,rikhsab,vodrom,?yegyda,?bps,ca,duolcrim,e&niram,rpcm...
Registered: Fri Nov 01 12:43:10 UTC 2024 - Last Modified: Tue Aug 06 02:37:31 UTC 2024 - 73.6K bytes - Viewed (0) -
guava/src/com/google/thirdparty/publicsuffix/PublicSuffixPatterns.java
dagod.citsalej,s&nd&ps,uolc,?ppatikria,?ysrab,??g!.&bew?gro?m&aug?oc??ofni?ten?ude?vog???h!.&0002?a&citore?idem?kitore??edszot?gro?ilus?letoh?m&alker?lif?t?urof??naltagni?o&c?ediv?fni?levynok?nisac??pohs?rarga?s&a&kal?zatu??emag?wen??t&lob?opsgolb,rops??virp?xe&s?zs??ytic?zsagoj??os?sut??l!.&etisbew321,topsgolb,??m!.&ca?gro?moc?oc?ro?ten?vog???n!.&duolcesirpretne,eni&esrem,m,?tenkcahs,?em!.&enilnoysrab,ysrab,???o&ggnaw?y!c???r!.&3kl,a&i&kymlak,rikhsab,vodrom,?yegyda,?bps,ca,duolcrim,e&niram,rpcm...
Registered: Fri Nov 01 12:43:10 UTC 2024 - Last Modified: Tue Aug 06 02:37:31 UTC 2024 - 73.6K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
VREV32 V5.B16, V5.B16 // a508206e VREV64 V2.S2, V3.S2 // 4308a00e VREV64 V2.S4, V3.S4 // 4308a04e // logical ops // // make sure constants get encoded into an instruction when it could AND R1@>33, R2 AND $(1<<63), R1 // AND $-9223372036854775808, R1 // 21004192
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Wed Jul 24 18:45:14 UTC 2024 - 95.2K bytes - Viewed (0) -
okhttp/src/main/kotlin/okhttp3/HttpUrl.kt
Registered: Fri Nov 01 11:42:11 UTC 2024 - Last Modified: Tue Jan 09 12:33:05 UTC 2024 - 63.5K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm.s
SLL.S $31, R5 // 855fb0e1 SLL R5, R6, R7 // 1675a0e1 SLL.S R5, R6, R7 // 1675b0e1 SLL R5, R7 // 1775a0e1 SLL.S R5, R7 // 1775b0e1 // Ops with zero shifts should encode as left shifts ADD R0<<0, R1, R2 // 002081e0 ADD R0>>0, R1, R2 // 002081e0 ADD R0->0, R1, R2 // 002081e0 ADD R0@>0, R1, R2 // 002081e0
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Fri Dec 15 20:51:01 UTC 2023 - 69K bytes - Viewed (0)