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Results 1 - 2 of 2 for bcl (0.87 sec)
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src/cmd/asm/internal/asm/testdata/ppc64.s
BCL $20,CR0LT,$1,LR // 4e800821 BCL $20,CR0LT,$0,LR // 4e800021 BCL $20,CR0LT,LR // 4e800021 BCL $20,CR0GT,LR // 4e810021 BCL 20,CR0LT,LR // BCL $20,CR0LT,LR // 4e800021 BCL 20,undefined_symbol,LR // BCL $20,CR0LT,LR // 4e800021 BCL 20,undefined_symbol+1,LR // BCL $20,CR0GT,LR // 4e810021
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 50.2K bytes - Viewed (0) -
src/cmd/link/internal/ppc64/asm.go
OP_MFLR_R0 = OP_MFLR | 0<<21 // mflr r0 OP_MTLR_R0 = OP_MTLR | 0<<21 // mtlr r0 // This is a special, preferred form of bcl to obtain the next // instruction address (NIA, aka PC+4) in LR. OP_BCL_NIA = OP_BCL | 20<<21 | 31<<16 | 1<<2 // bcl 20,31,$+4 // Masks to match opcodes MASK_PLD_PFX = 0xfff70000 MASK_PLD_SFX = 0xfc1f0000 // Also checks RA = 0 if check value is OP_PLD_SFX.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 19 20:54:08 UTC 2024 - 63.7K bytes - Viewed (0)