- Sort Score
- Result 10 results
- Languages All
Results 1 - 5 of 5 for armv7 (0.03 sec)
-
.bazelrc
# elinux: General Embedded Linux options shared by all flavors. # elinux_aarch64: Embedded Linux options for aarch64 (ARM64) CPU support. # elinux_armhf: Embedded Linux options for armhf (ARMv7) CPU support. # # Release build options (for all operating systems) # release_base: Common options for all builds on all operating systems.
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 11 17:12:54 UTC 2024 - 52.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM.rules
(Com(32|16|8) ...) => (MVN ...) (Sqrt ...) => (SQRTD ...) (Sqrt32 ...) => (SQRTF ...) (Abs ...) => (ABSD ...) // TODO: optimize this for ARMv5 and ARMv6 (Ctz32NonZero ...) => (Ctz32 ...) (Ctz16NonZero ...) => (Ctz32 ...) (Ctz8NonZero ...) => (Ctz32 ...) // count trailing zero for ARMv5 and ARMv6 // 32 - CLZ(x&-x - 1) (Ctz32 <t> x) && buildcfg.GOARM.Version<=6 => (RSBconst [32] (CLZ <t> (SUBconst <t> (AND <t> x (RSBconst <t> [0] x)) [1])))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 90.1K bytes - Viewed (0) -
src/debug/elf/file_test.go
{ entry: &dwarf.Entry{ Offset: 0xb, Tag: dwarf.TagCompileUnit, Children: true, Field: []dwarf.Field{ {Attr: dwarf.AttrProducer, Val: "GNU C 4.9.2 20141224 (prerelease) -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -mtls-dialect=gnu -g", Class: dwarf.ClassString}, {Attr: dwarf.AttrLanguage, Val: int64(1), Class: dwarf.ClassConstant},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Sep 22 16:22:42 UTC 2023 - 60.1K bytes - Viewed (0) -
src/runtime/malloc.go
// supports this extension and the kernel will never choose an // address above 1<<47 unless mmap is called with a hint // address above 1<<47 (which we never do). // // arm64 hardware (as of ARMv8) limits user addresses to 48 // bits, in the range [0, 1<<48). // // ppc64, mips64, and s390x support arbitrary 64 bit addresses // in hardware. On Linux, Go leans on stricter OS limits. Based
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 29 17:58:53 UTC 2024 - 59.6K bytes - Viewed (0) -
src/cmd/internal/obj/arm/asm5.go
o2 = c.ofsr(p.As, int(p.To.Reg), 0, (REGTMP&15), int(p.Scond), p) | 1<<20 if o.flag&LPCREL != 0 { o3 = o2 o2 = c.oprrr(p, AADD, int(p.Scond)) | REGTMP&15 | (REGPC&15)<<16 | (REGTMP&15)<<12 } /* ArmV4 ops: */ case 70: /* movh/movhu R,O(R) -> strh */ c.aclass(&p.To) r := int(p.To.Reg) if r == 0 { r = int(o.param) } o1 = c.oshr(int(p.From.Reg), int32(c.instoffset), r, int(p.Scond))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 15 20:51:01 UTC 2023 - 79.4K bytes - Viewed (0)