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Results 1 - 10 of 13 for fsub (0.07 sec)
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src/cmd/asm/internal/asm/testdata/ppc64.s
FADDS F1, F2, F3 // ec62082a FADDSCC F1, F2, F3 // ec62082b FSUB F1, F2 // fc420828 FSUB F1, F2, F3 // fc620828 FSUBCC F1, F2, F3 // fc620829 FSUBS F1, F2 // ec420828 FSUBS F1, F2, F3 // ec620828 FSUBCC F1, F2, F3 // fc620829 FSUBSCC F1, F2, F3 // ec620829
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 50.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/S390XOps.go
{name: "FSUBS", argLength: 2, reg: fp21clobber, typ: "(Float32,Flags)", asm: "FSUBS", resultInArg0: true}, // fp32 arg0 - arg1 {name: "FSUB", argLength: 2, reg: fp21clobber, typ: "(Float64,Flags)", asm: "FSUB", resultInArg0: true}, // fp64 arg0 - arg1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 52.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/S390X.rules
(Add(64|Ptr) ...) => (ADD ...) (Add(32|16|8) ...) => (ADDW ...) (Add32F x y) => (Select0 (FADDS x y)) (Add64F x y) => (Select0 (FADD x y)) (Sub(64|Ptr) ...) => (SUB ...) (Sub(32|16|8) ...) => (SUBW ...) (Sub32F x y) => (Select0 (FSUBS x y)) (Sub64F x y) => (Select0 (FSUB x y)) (Mul64 ...) => (MULLD ...) (Mul(32|16|8) ...) => (MULLW ...) (Mul32F ...) => (FMULS ...) (Mul64F ...) => (FMUL ...) (Mul64uhilo ...) => (MLGR ...)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 12 18:09:26 UTC 2023 - 74.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64.rules
// and will not run on earlier targets. // (Add(Ptr|64|32|16|8) ...) => (ADD ...) (Add64F ...) => (FADD ...) (Add32F ...) => (FADDS ...) (Sub(Ptr|64|32|16|8) ...) => (SUB ...) (Sub32F ...) => (FSUBS ...) (Sub64F ...) => (FSUB ...) (Min(32|64)F x y) && buildcfg.GOPPC64 >= 9 => (XSMINJDP x y) (Max(32|64)F x y) && buildcfg.GOPPC64 >= 9 => (XSMAXJDP x y) // Combine 64 bit integer multiply and adds
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 53.2K bytes - Viewed (0) -
src/cmd/internal/obj/arm/asm5.go
var as2 obj.As switch p.As { case AADD: as2 = ASUB // ADD -> ADD/SUB pair case ASUB: as2 = AADD // SUB -> SUB/ADD pair case ARSB: as2 = ASUB // RSB -> RSB/SUB pair case AADC: as2 = ASUB // ADC -> ADC/SUB pair case ASBC: as2 = AADD // SBC -> SBC/ADD pair case ARSC: as2 = ASUB // RSC -> RSC/SUB pair default: c.ctxt.Diag("unknown second op for %v", p)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 15 20:51:01 UTC 2023 - 79.4K bytes - Viewed (0) -
src/cmd/internal/obj/mips/asm0.go
{AMOVWU, C_REG, C_NONE, C_REG, 14, 8, 0, sys.MIPS64, NOTUSETMP}, {ASUB, C_REG, C_REG, C_REG, 2, 4, 0, 0, 0}, {ASUBV, C_REG, C_REG, C_REG, 2, 4, 0, sys.MIPS64, 0}, {AADD, C_REG, C_REG, C_REG, 2, 4, 0, 0, 0}, {AADDV, C_REG, C_REG, C_REG, 2, 4, 0, sys.MIPS64, 0}, {AAND, C_REG, C_REG, C_REG, 2, 4, 0, 0, 0}, {ASUB, C_REG, C_NONE, C_REG, 2, 4, 0, 0, 0}, {ASUBV, C_REG, C_NONE, C_REG, 2, 4, 0, sys.MIPS64, 0},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 17:46:09 UTC 2024 - 53.6K bytes - Viewed (0) -
src/cmd/internal/obj/riscv/obj.go
// order as they are in the specification: RS1, RS2, RS3, RD. ins.rs1, ins.rs2 = ins.rs2, ins.rs1 case ANEG, ANEGW: // NEG rs, rd -> SUB rs, X0, rd ins.as = ASUB if p.As == ANEGW { ins.as = ASUBW } ins.rs1 = REG_ZERO if ins.rd == obj.REG_NONE { ins.rd = ins.rs2 } case ANOT: // NOT rs, rd -> XORI $-1, rs, rd
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sun Apr 07 03:32:27 UTC 2024 - 77K bytes - Viewed (0) -
src/cmd/internal/obj/loong64/asm.go
{AMOVWU, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 14, 8, 0, NOTUSETMP}, {ASUB, C_REG, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, {ASUBV, C_REG, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, {AADD, C_REG, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, {AADDV, C_REG, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, {AAND, C_REG, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, {ASUB, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 2, 4, 0, 0},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 61.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64Ops.go
{name: "FADDD", argLength: 2, reg: fp21, asm: "FADDD", commutative: true}, // arg0 + arg1 {name: "FSUBS", argLength: 2, reg: fp21, asm: "FSUBS"}, // arg0 - arg1 {name: "FSUBD", argLength: 2, reg: fp21, asm: "FSUBD"}, // arg0 - arg1 {name: "FMULS", argLength: 2, reg: fp21, asm: "FMULS", commutative: true}, // arg0 * arg1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 58.8K bytes - Viewed (0) -
src/main/java/jcifs/smb/SmbTransportImpl.java
Registered: Wed Jun 12 15:45:55 UTC 2024 - Last Modified: Wed Jan 18 23:47:00 UTC 2023 - 67K bytes - Viewed (0)