// insert low width bits of arg0 into the result starting at bit lsb, bits to the left and right of the inserted bit field are zeroed
		{name: "UBFIZ", argLength: 1, reg: gp11, asm: "UBFIZ", aux: "ARM64BitField"},
		// extract width bits of arg0 starting at bit lsb and insert at low end of result, remaining high bits are zeroed

	STPW	(R3, R4), x+8(SB)

// bit field operation
	BFI	$0, R1, $1, R2      // 220040b3
	BFIW	$0, R1, $1, R2      // 22000033
	SBFIZ	$0, R1, $1, R2      // 22004093
	SBFIZW	$0, R1, $1, R2      // 22000013
	UBFIZ	$0, R1, $1, R2      // 220040d3
	UBFIZW	$0, R1, $1, R2      // 22000053

// FSTPD/FSTPS/FLDPD/FLDPS
	FLDPD	(R0), (F1, F2)      // 0108406d
	FLDPD	8(R0), (F1, F2)     // 0188406d