// ((x>>8) | (x<<8)) -> (REV16 x), the type of x is uint16, "|" can also be "^" or "+".
// UBFX instruction is supported by ARMv6T2, ARMv7 and above versions, REV16 is supported by
// ARMv6 and above versions. So for ARMv6, we need to match SLLconst, SRLconst and ORshiftLL.
((ADDshiftLL|ORshiftLL|XORshiftLL) <typ.UInt16> [8] (BFXU <typ.UInt16> [int32(armBFAuxInt(8, 8))] x) x) => (REV16 x)

		{name: "REVW", argLength: 1, reg: gp11, asm: "REVW"},                                  // byte reverse, 32-bit
		{name: "REV16", argLength: 1, reg: gp11, asm: "REV16"},                                // byte reverse in each 16-bit halfword, 64-bit
		{name: "REV16W", argLength: 1, reg: gp11, asm: "REV16W"},                              // byte reverse in each 16-bit halfword, 32-bit

	MMUL	R1, R2, R3           // 12f153e7
	MULBB	R1, R2, R3           // 820163e1
	MULWB	R1, R2, R3           // a20123e1
	MULWT	R1, R2, R3           // e20123e1

// REV
	REV	R1, R2               // 312fbfe6
	REV16	R1, R2               // b12fbfe6
	REVSH	R1, R2               // b12fffe6
	RBIT	R1, R2               // 312fffe6

// XTAB/XTAH/XTABU/XTAHU
	XTAB	R2@>0, R8            // 7280a8e6