bool allow_tensorlist_pass_through_;

  // This flag will control the behavior of setting the batch size one when the
  // given batch size is None in order to force to proceed the tensor list op
  // lowerings.
  bool default_to_single_batch_;
};

// Converts tf.Const containing variant of type TensorList to a tensor of
// primitive element types. Each of the individual tensor in the list is

This op is rewritten to generic ops that perform the scale and shift
and can operate on non-quantized types.

Currently, TF_DequantizeOp is the only op with a lowering that falls
in this category. When more lowerings are added (e.g. QuantizeV2Op),
they should be added to this pass.
### `-tf-mark-ops-for-outside-compilation`

(Neg64F ...) => (FNEG ...)

(Com64 ...) => (NOT ...)
(Com(32|16|8) ...) => (NOTW ...)
(NOT x) => (XOR (MOVDconst [-1]) x)
(NOTW x) => (XORWconst [-1] x)

// Lowering boolean ops
(AndB ...) => (ANDW ...)
(OrB ...) => (ORW ...)
(Not x) => (XORWconst [1] x)

// Lowering pointer arithmetic
(OffPtr [off] ptr:(SP)) => (MOVDaddr [int32(off)] ptr)
(OffPtr [off] ptr) && is32Bit(off) => (ADDconst [int32(off)] ptr)

(Neg64F x) => (PXOR x (MOVSDconst <typ.Float64> [math.Copysign(0, -1)]))

// Lowering boolean ops
(AndB ...) => (ANDL ...)
(OrB ...) => (ORL ...)
(Not x) => (XORLconst [1] x)

// Lowering pointer arithmetic
(OffPtr [off] ptr) && is32Bit(off) => (ADDQconst [int32(off)] ptr)
(OffPtr [off] ptr) => (ADDQ (MOVQconst [off]) ptr)

// Lowering other arithmetic
(Ctz64 x)     && buildcfg.GOAMD64 >= 3 => (TZCNTQ x)

(Neg(64|32|16|8) ...) => (NEG ...)
(Neg(64|32)F ...) => (FNEG ...)

(Com(64|32|16|8) x) => (NOR x x)

// Lowering boolean ops
(AndB ...) => (AND ...)
(OrB ...) => (OR ...)
(Not x) => (XORconst [1] x)

// Merge logical operations
(AND x (NOR y y)) => (ANDN x y)
(OR x (NOR y y)) => (ORN x y)

// Lowering comparisons
(EqB x y)  => (ANDconst [1] (EQV x y))

  float half_range = is_unsigned ? 0 : 128;
  return GetScalarOfType(builder->getF32Type(), half_range);
}

// Returns reduction indices to use while lowering tf.BiasAddGrad op to tf.Sum
// op.
DenseIntElementsAttr GetBiasAddGradReductionIndices(int64_t rank,
                                                    StringAttr data_format,

		t.Fatal(err)
	}

	// Get the key for the controller
	rsKey, err := controller.KeyFunc(rsSpec)
	if err != nil {
		t.Errorf("Couldn't get key for object %#v: %v", rsSpec, err)
	}

	// Lowering expectations should lead to a sync that creates a replica, however the
	// fakePodControl error will prevent this, leaving expectations at 0, 0
	manager.expectations.CreationObserved(logger, rsKey)
	rsSpec.Status.Replicas = 1

}

// Verify SpaceToBatchND with input tensor of element type f16. This test case is derived from 'fourdim_space_to_batch_nd'. It checks the output
// tensor shape and element type in a few lines in the resulting lowering.
// CHECK-LABEL: space_to_batch_nd_element_type_f16
func.func @space_to_batch_nd_element_type_f16(%input: tensor<3x5x7x10xf16>, %block_shape: tensor<2xi64>, %paddings: tensor<2x2xi64>) -> tensor<?x?x?x10xf16> {

// of this conversion is:
// a' = (ADDCC x y)
// a  = (Select0 a')
// b  = (CMPconst [0] a)
// c  = (OR a z)
//
// Which makes it trivial to rewrite b using a lowering rule.
func convertPPC64OpToOpCC(op *Value) *Value {
	ccOpMap := map[Op]Op{
		OpPPC64ADD:      OpPPC64ADDCC,
		OpPPC64ADDconst: OpPPC64ADDCCconst,
		OpPPC64AND:      OpPPC64ANDCC,